MAX1366ECM-T Maxim Integrated, MAX1366ECM-T Datasheet - Page 29

• Manufacturer Part Number: MAX1366ECM-T
• Description: LED Display Drivers
• Manufacturer: Maxim Integrated

Specifications of MAX1366ECM-T

• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C

For the MAX1366/MAX1368, a voltage proportional to
the ADC input is available at DACVOUT. Connect
DACVOUT to CONV_IN for normal operation. (See
Figure 20 for DAC transfer function).
In normal operation, pull DACDATA_SEL low to use the
ADC output as the DAC input. Pull DACDATA_SEL high
to allow data to be written to the DAC register using the
SPI/QSPI/MICROWIRE interface. Once DACDATA_SEL
is pulled high, the three digital inputs (CS_DAC, DIN,
and SCLK) load the digital input data serially into the
DAC. (See
To clock data into the DAC shift register, drive CS_DAC
low. SCLK synchronizes the data transfer. Immediately,
following CS_DAC high-to-low transition, the data shifts
synchronously into the serial shift register on the rising
edge of the serial clock input (SCLK). After 16 data bits
have been loaded into the serial input register, the data
latches to the DAC register on the rising edge of
CS_DAC. The DAC output updates on the next conver-
sion clock (2.5Hz). DIN is transferred MSB first.
The MAX1366/MAX1368 reference sets the full-scale
range of the ADC transfer function. With a nominal
2.048V reference, the ADC full-scale range is ±2V with
RANGE = GND. With RANGE = DV
range is ±200mV. A decreased reference voltage
decreases full-scale range (see the Transfer Functions
section).
The MAX1366/MAX1368 accept either an external ref-
erence or an internal reference (INTREF). The INTREF
logic selects the reference mode (see the Control
Default values: B1E0h
The peak data register is a 16-bit read-only register.
Set the PEAK bit to 1 to enable the PEAK function. This
register stores the peak value of the ADC conversion
result. First, the current ADC result is saved to the
PEAK register, then the new ADC conversion result is
compared to this value. If the new value is larger than
the value in the peak register, the MAX1366/MAX1368
save the new value to the peak register. If the new
LED Data Register (Read/Write)
MSB
D15
Microcontroller-Interface, 4.5-/3.5-Digit Panel
D14
Figure
D13
11.)
______________________________________________________________________________________
D12
D11
DAC Operation
DD,
D10
ADC Reference
the full-scale
Reference
D9
Meters with 4–20mA Output
D8
D7
Register (Read/Write) section). The default power-on
state sets the MAX1366/MAX1368 to use the external
reference with the INTREF bit cleared to zero.
For internal-reference operation, set the INTREF bit to
one
with a 4.7µF capacitor. The internal reference provides
a nominal 2.048V source between REF+ and GND. The
internal-reference temperature coefficient is typically
40ppm/°C.
For external-reference operation, set INTREF to GND.
REF+ and REF- are fully differential. For a valid external-
reference input, V
Bypass REF+ and REF- with a 0.1µF or greater capaci-
tor to GND in external-reference mode.
Figure 14
with an external single-ended differential reference. In
this figure, REF- is connected to the top of the strain
gauge and REF+ is connected to the midpoint of the
resistor-divider of the supply.
Figure 15
an external single-ended reference. In this figure, REF-
is connected to GND and REF+ is driven with an exter-
nal 2.048V reference. Bypass REF+ to GND with a
0.1µF capacitor.
The DAC of the MAX1366/MAX1368 accepts either an
external reference or an internal reference. For external-
reference operation, disable the DAC reference buffer by
setting REFSELE to DV
to REF_DAC.
For internal-reference operation, enable the DAC refer-
ence buffer by setting REFSELE to GND. In this mode,
leave REFDAC floating.
value is less than the value in the peak register, the
value in the peak register remains unchanged. Set the
PEAK bit to zero to clear the value in the PEAK register.
The data is represented in two’s-complement format.
For the MAX1366, the data is 16-bit and D15 is the
MSB. For the MAX1368, the data is 12-bit, D15 is the
MSB, and D4 is the LSB followed by 4 trailing sub-bits.
,
connect REF- to GND, and bypass REF+ to GND
D6
shows the MAX1366/MAX1368 operating with
shows the MAX1366/MAX1368 operating
D5
(MAX1368)
REF+
LSB
D4
DD
must be greater than V
and connect a voltage source
D3
D2
DAC Reference
D1
(MAX1366)
REF-
D0
LSB
29
.