L6472H STMicroelectronics, L6472H Datasheet - Page 30

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L6472H

Manufacturer Part Number
L6472H
Description
Motor / Motion / Ignition Controllers & Drivers Motor DRV SPI dSPIN 7.0A 3.0 rms 8 - 45V
Manufacturer
STMicroelectronics
Type
2 Phase Stepper Motor Driverr
Datasheet

Specifications of L6472H

Product Category
Motor / Motion / Ignition Controllers & Drivers
Rohs
yes
Product
Stepper Motor Controllers / Drivers
Operating Supply Voltage
8 V to 45 V
Supply Current
0.5 mA
Operating Temperature
- 25 C to + 125 C
Mounting Style
SMD/SMT
Package / Case
HTSSOP-28
Power Dissipation
5 W

Available stocks

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Functional description
6.13
6.14
6.15
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External switch (SW pin)
The SW input is internally pulled-up to V
ground (see
The SW_F bit of the STATUS register indicates if the switch is open (‘0’) or closed (‘1’) (see
Section
SW_EVN flag of the STATUS register is raised when a switch turn-on event (SW input falling
edge) is detected (see
(see
By default a switch turn-on event causes a HardStop interrupt (SW_MODE bit of the
CONFIG register set to ‘0’). Otherwise (SW_MODE bit of the CONFIG register set to ‘1’),
switch input events do not cause interrupts and the switch status information is at the user’s
disposal (see
The switch input can be used by the GoUntil and ReleaseSW commands as described in
Section 9.2.10
If the SW input is not used, it should be connected to VDD.
Programmable DMOS slew rate, dead time and blanking time
Using the POW_SR parameter in the CONFIG register, it is possible to set the commutation
speed of the power bridge output (see
Integrated analog-to-digital converter
The L6472 integrates an N
voltage equal to VREG. The analog-to-digital converter input is available through the ADCIN
pin and the conversion result is available in the ADC_OUT register (see
The sampling frequency is equal to the clock frequency divided by 512.
The ADC_OUT value can be used for the torque regulation or can remain at the user’s
disposal.
Figure 13. External switch connection
Section
9.1.19); the bit value is refreshed at every system clock cycle (125 ns). The
Figure
9.2.20).
Table
and 9.2.11.
13).
26).
Section
ADC
Doc ID 022729 Rev 2
bit ramp-compare analog-to-digital converter with a reference
9.1.19). A GetStatus command releases the SW_EVN flag
Table
DD
and detects if the pin is open or connected to
28).
Section
9.1.13).
L6472

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