MC10XS3412DHFK Freescale Semiconductor, MC10XS3412DHFK Datasheet - Page 34

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MC10XS3412DHFK

Manufacturer Part Number
MC10XS3412DHFK
Description
Power Switch ICs - Power Distribution Eswitch Gen3 1012
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC10XS3412DHFK

Rohs
yes
Number Of Outputs
4
Operating Supply Voltage
6 V to 20 V
Supply Current (max)
20 mA
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
PQFN-24
Minimum Operating Temperature
- 40 C
DEVICE REGISTER ADDRESSING
addresses (D[14:10]) and their impact on device operation.
ADDRESS XX000 — STATUS REGISTER
(STATR_S)
the various configuration register contents without disrupting
the device operation or the register contents. The register bits
D[4:0] determine the content of the first sixteen bits of SO
data. In addition to the device status, this feature provides the
ability to read the content of the PWMR_s, CONFR0_s,
CONFR1_s, OCR_s, GCR and CALR registers (Refer to the
section entitled
Return Data) on page
ADDRESS A
REGISTER (PWMR_S)
of corresponding output through the SPI. Each output “s” is
independently selected for configuration based on the state
of the D14 : D13 bits
34
10XS3412
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 11. Serial Input Address and Configuration Bit Map
RST=0 or
condition
PWMR_s WDI
STATR_s WDI
CONFR0
CONFR1
V
V
Register
Register
x = Don’t care.
s = Output selection with the bits A
OCR_s
CALR
DD(FAIL)
SUPPLY(
The following section describes the possible register
The STATR register is used to read the device status and
The PWMR_s register allows the MCU to control the state
state
GCR
after
POR)
_s
_s
SI
or
WDI
WDI
WDI
WDI
WDI
D15
N
N
N
N
N
N
N
0
1
Serial Output Communication (Device Status
D1
A
A
A
A
A
X
4
0
0
0
1
1
1
1
0
001— OUTPUT PWM CONTROL
D1
A
A
A
A
3
X
0
0
0
(Table
0
0
0
0
37.
D1
2
0
0
0
0
1
1
1
X
D1
12).
X
1
0
0
1
1
0
0
1
D1
X
0
0
1
0
1
0
1
1
1
A
0
D9
0
0
0
0
0
0
0
0
as defined in
Xenon_
VDD_F
28W_s
AIL_en
D8
0
0
0
s
1
0
PWM_en CLOCK_sel TEMP_en
BC1_s
ON_s
Table
D7
0
0
0
0
0
12.
unlimited_s
PWM6_s
Retry_
BC0_s
D6
0
0
1
0
Retry_dis_
DIR_dis_s
SI Data
PWM5_s
OC1_s
Table 12. Output Selection
protection profile: the overcurrent thresholds are divided by 2
and, the inrush and cooling responses are dedicated to 28 W
lamp.
corresponding output switch and a logic [0] turns it OFF (if IN
input is also pulled down). Bits D6:D0 set the output PWM
duty-cycle to one of 128 levels for PWM_en is set to logic [1],
as shown
ADDRESS A
REGISTER (CONFR0_S)
corresponding output switching through the SPI. Each output
“s” is independently selected for configuration based on the
state of the D14 : D13 bits
will enable the output for direct control. A logic [1] on bit D5
D5
0
s
0
0
A logic [1] on bit D8 (28W_s) selects the 28 W overcurrent
Bit D7 sets the output state. A logic [1] enables the
The CONFR0_s register allows the MCU to configure
For the selected output, a logic [0] on bit D5 (DIR_DIS_s)
A
1
CSNS_en
OS_dis_s
PWM4_s
(D14)
OC0_s
0
0
1
1
SR1_s
SOA4
Table
D4
1
0
1
A
7.
0
OLON_dis_
010— OUTPUT CONFIGURATION
PWM3_s
OCHI_s
CSNS1
SR0_s
SOA3
D3
s
1
0
Analog Integrated Circuit Device Data
(Table
A
0
OLOFF_dis_
(D13)
DELAY2_s
0
1
0
1
OCLO1_s
PWM2_s
CSNS0
SOA2
D2
12).
0
0
s
Freescale Semiconductor
OLLED_en
DELAY1_s DELAY0_s
OCLO0_s OC_mode_
PWM1_s
SOA1
D1
_s
X
1
0
HS Selection
HS0 (default)
HS1
HS2
HS3
CSNS_ratio
PWM0_s
OV_dis
SOA0
D0
_s
s
1
0

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