MCIMX6U6AVM08ABR Freescale Semiconductor, MCIMX6U6AVM08ABR Datasheet - Page 108
MCIMX6U6AVM08ABR
Manufacturer Part Number
MCIMX6U6AVM08ABR
Description
Processors - Application Specialized i.MX6 DualLite
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6S6AVM08ABR.pdf
(174 pages)
Specifications of MCIMX6U6AVM08ABR
Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
16 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
Parallel
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
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Electrical Characteristics
4.11.10.6.3 TFT Panel Sync Pulse Timing Diagrams
Figure 68
the data. All the parameters shown in the figure are programmable. All controls are started by
corresponding internal events—local start points. The timing diagrams correspond to inverse polarity of
the IPP_DISP_CLK signal and active-low polarity of the HSYNC, VSYNC, and DRDY signals.
Figure 69
programmable.
108
IPP_DISP_CLK
IPP_DATA
DI clock
VSYNC
HSYNC
DRDY
IP5o
depicts the horizontal timing (timing of one line), including both the horizontal sync pulse and
depicts the vertical timing (timing of one frame). All parameters shown in the figure are
HSYNC
VSYNC
DRDY
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
IP13o
IP11
Figure 68. TFT Panels Timing Diagram—Horizontal Sync Pulse
Figure 69. TFT Panels Timing Diagram—Vertical Sync Pulse
IP13
IP14
IP8o
IP9
IP8
IP9o
Start of frame
IP12
IP6
D0
IP5
IP7
End of frame
D1
Freescale Semiconductor
Dn
IP15
IP10
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