MT46H64M16LFCK-6 IT:A TR Micron Technology Inc, MT46H64M16LFCK-6 IT:A TR Datasheet - Page 83
![IC DDR SDRAM 1GBIT 60VFBGA](/photos/7/23/72339/60vfbga-package_sml.jpg)
MT46H64M16LFCK-6 IT:A TR
Manufacturer Part Number
MT46H64M16LFCK-6 IT:A TR
Description
IC DDR SDRAM 1GBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H64M16LFCK-6 IT:A TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
1G (64M x 16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
115mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1335-2
Figure 45: Bank Read – Without Auto Precharge
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. K 07/09 EN
Case 2:
Case 1:
Command
BA0, BA1
Address
DQ
DQ
DQS
DQS
t
t
AC (MAX) and
CK#
CKE
A10
AC (MIN) and
DM
CK
7,8
7,8
7
7
t
t
IS
IS
NOP
T0
t
t
DQSCK (MIN)
DQSCK (MAX)
t
t
1
IH
IH
Notes:
t
ACTIVE
Bank x
IS
t
Row
IS
Row
T1
t
IH
t
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T5 is “Don’t Care” if A10 is HIGH at T5.
6. The PRECHARGE command can only be applied at T5 if
IH
t
CK
these times.
t
t
t
RCD
RAS
RC
NOP
6
T2
1
t
CH
t
CL
Bank x
READ
t
Note 4
t
Col n
IS
LZ (MIN)
T3
t
2
IH
CL = 2
83
t
RPRE
t
t
AC (MIN)
LZ (MIN)
NOP
T4
1
t
AC (MAX)
1Gb: x16, x32 Mobile LPDDR SDRAM
D
t
Micron Technology, Inc. reserves the right to change products or specifications without notice.
OUT
RPRE
t
DQSCK (MIN)
One bank
All banks
Bank x
D
PRE
OUT
T5
D
t
OUT
DQSCK (MAX)
3
5
D
T5n
OUT
D
OUT
D
NOP
t
OUT
T6
RPST
D
t
RAS (MIN) is met.
OUT
Don’t Care
1
t
RP
T6n
t
HZ (MAX)
©2007 Micron Technology, Inc. All rights reserved.
D
t
RPST
OUT
Auto Precharge
NOP
T7
1
Transitioning Data
ACTIVE
Bank x
Row
Row
T8