C8051F347-GMR Silicon Labs, C8051F347-GMR Datasheet - Page 57
![no-image](/images/no-image-200.jpg)
C8051F347-GMR
Manufacturer Part Number
C8051F347-GMR
Description
8-bit Microcontrollers - MCU 25 MIPS 32KB 10 ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F349-GMR.pdf
(276 pages)
Specifications of C8051F347-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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6.
The Voltage reference MUX on C8051F34x devices is configurable to use an externally connected voltage
reference, the on-chip reference voltage generator, or the power supply voltage V
REFSL bit in the Reference Control register (REF0CN) selects the reference source. For the internal refer-
ence or an external source, REFSL should be set to ‘0’; For V
be set to ‘1’.
The BIASE bit enables the internal ADC bias generator, which is used by the ADC and Internal Oscillator.
This enable is forced to logic 1 when either of the aforementioned peripherals is enabled. The ADC bias
generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see SFR Defini-
tion 6.1 for REF0CN register details. The Reference bias generator (see Figure 6.1) is used by the Internal
Voltage Reference, Temperature Sensor, and Clock Multiplier. The Reference bias is automatically
enabled when any of the aforementioned peripherals are enabled. The electrical specifications for the volt-
age reference and bias circuits are given in Table 6.1.
Important Note About the VREF Pin: The VREF pin, when not using the on-chip voltage reference or an
external precision reference, can be configured as a GPIO Port pin. When using an external voltage refer-
ence or the on-chip reference, the VREF pin should be configured as analog pin and skipped by the Digital
Crossbar. To configure the VREF pin for analog mode, set the corresponding bit in the PnMDIN register to
‘0’. To configure the Crossbar to skip the VREF pin, set the corresponding bit in register PnSKIP to ‘1’.
Refer to
The temperature sensor connects to the ADC0 positive input multiplexer (see
plexer” on page 42
sensor. While disabled, the temperature sensor defaults to a high impedance state and any ADC0 mea-
surements performed on the sensor result in meaningless data.
Voltage Reference (C8051F340/1/2/3/4/5/6/7/A/B Only)
Section “15. Port Input/Output” on page 142
GND
VDD
R1
Figure 6.1. Voltage Reference Functional Block Diagram
Reference
External
Voltage
Circuit
for details). The TEMPE bit in register REF0CN enables/disables the temperature
VREF
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
VDD
REF0CN
0
1
TEMPE
Rev. 1.3
Reference
CLKMUL
REFBE
Internal
Enable
IOSCEN
for complete Port I/O configuration details.
AD0EN
EN
DD
EN
EN
EN
as the reference source, REFSL should
Temp Sensor
Reference
ADC Bias
Bias
Section “5.1. Analog Multi-
DD
To ADC,
Internal Oscillator
To Analog Mux
(to ADC)
To Clock Multiplier,
Temp Sensor
VREF
(see Figure 6.1). The
57
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