C8051F591-IMR Silicon Labs, C8051F591-IMR Datasheet - Page 267
C8051F591-IMR
Manufacturer Part Number
C8051F591-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F591-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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SFR Definition 25.1. SCON1: Serial Port 1 Control
SFR Address = 0x98; SFR Page = 0x10; Bit-Addressable
Name S1MODE
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
S1MODE Serial Port 1 Operation Mode.
Unused
MCE1
Name
REN1
RB81
TB81
RI1
TI1
R/W
7
0
Selects the UART1 Operation Mode.
0: 8-bit UART with Variable Baud Rate.
1: 9-bit UART with Variable Baud Rate.
Read = 1b, Write = Don’t Care.
Multiprocessor Communication Enable.
The function of this bit is dependent on the Serial Port 1 Operation Mode:
Mode 0: Checks for valid stop bit.
0: Logic level of stop bit is ignored.
1: RI1 will only be activated if stop bit is logic level 1.
Mode 1: Multiprocessor Communications Enable.
0: Logic level of ninth bit is ignored.
1: RI1 is set and an interrupt is generated only when the ninth bit is logic 1.
Receive Enable.
0: UART1 reception disabled.
1: UART1 reception enabled.
Ninth Transmission Bit.
The logic level of this bit will be sent as the ninth transmission bit in 9-bit UART Mode
(Mode 1). Unused in 8-bit mode (Mode 0).
Ninth Receive Bit.
RB81 is assigned the value of the STOP bit in Mode 0; it is assigned the value of the
9th data bit in Mode 1.
Transmit Interrupt Flag.
in 8-bit UART Mode, or at the beginning of the STOP bit in 9-bit UART Mode). When
the UART1 interrupt is enabled, setting this bit causes the CPU to vector to the UART1
interrupt service routine. This bit must be cleared manually by software.
Receive Interrupt Flag.
Set to ‘1’ by hardware when a byte of data has been received by UART1 (set at the
STOP bit sampling time). When the UART1 interrupt is enabled, setting this bit to ‘1’
causes the CPU to vector to the UART1 interrupt service routine. This bit must be
cleared manually by software.
Set by hardware when a byte of data has been transmitted by UART1 (after the 8th bit
R
6
1
MCE1
R/W
5
0
REN1
R/W
Rev. 1.2
4
0
Function
TB81
R/W
3
0
C8051F58x/F59x
RB81
R/W
2
0
R/W
TI1
1
0
R/W
RI1
0
0
267
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