C8051F591-IMR Silicon Labs, C8051F591-IMR Datasheet - Page 283
C8051F591-IMR
Manufacturer Part Number
C8051F591-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F591-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 283 of 356
- Download datasheet (3Mb)
27. Timers
Each MCU includes six counter/timers: two are 16-bit counter/timers compatible with those found in the
standard 8051, and the other four are 16-bit auto-reload timers for use with the ADC, SMBus, or for gen-
eral purpose use. These timers can be used to measure time intervals, count external events and generate
periodic interrupt requests. Timer 0 and Timer 1 are nearly identical and have four primary modes of oper-
ation. Timer 2 and Timer 3 offer 16-bit and split 8-bit timer functionality with auto-reload. Timer 4 and
Timer 5 have 16-bit auto reload and capture and can also produce a 50% duty-cycle square wave (toggle
output) at an general purpose port pin.
Timers 0 and 1 may be clocked by one of five sources, determined by the Timer Mode Select bits (T1M –
T0M) and the Clock Scale bits (SCA1 – SCA0). The Clock Scale bits define a pre-scaled clock from which
Timer 0 and/or Timer 1 may be clocked (See SFR Definition 27.1 for pre-scaled clock selection).Timer 0/1
may then be configured to use this pre-scaled clock signal or the system clock.
Timer 2 and Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external
oscillator clock source divided by 8.
Timer 4 and Timer 5 may be clocked by the system clock, system clock divided by 2 or 12, or the external
oscillator clock source divided by 8.
Timers 0, 1, 4, and 5 may also be operated as counters. When functioning as a counter, a counter/timer
register is incremented on each high-to-low transition at the selected input pin. Events with a frequency of
up to one-fourth the system clock frequency can be counted. The input signal need not be periodic, but it
should be held at a given level for at least two full system clock cycles to ensure the level is properly sam-
pled.
13-bit counter/timer
16-bit counter/timer
8-bit counter/timer with
auto-reload
Two 8-bit counter/timers (Timer 0
only)
Timer 0 and Timer 1 Modes
16-bit timer with auto-reload
Two 8-bit timers with auto-reload
Timer 2 and 3 Modes
Rev. 1.2
C8051F58x/F59x
16-bit timer with auto-reload
16-bit counter/timer with capture
Toggle Output
Timer 4 and 5 Modes
283
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