C8051F703-GQR Silicon Labs, C8051F703-GQR Datasheet - Page 298
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C8051F703-GQR
Manufacturer Part Number
C8051F703-GQR
Description
8-bit Microcontrollers - MCU 16kB Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F703-GQR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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Part Number:
C8051F703-GQR
Manufacturer:
Silicon Laboratories Inc
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10 000
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C8051F70x/71x
SFR Definition 34.4. PCA0CPMn: PCA Capture/Compare Mode
SFR Addresses: PCA0CPM0 = 0xDA
SFR Pages:
298
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
PWM16n 16-bit Pulse Width Modulation Enable.
ECOMn
CAPNn
CAPPn
ECCFn
PWMn
Name
TOGn
MATn
PWM16n
R/W
7
0
PCA0CPM0 = F
This bit enables 16-bit mode when Pulse Width Modulation mode is enabled.
0: 8 to 11-bit PWM selected.
1: 16-bit PWM selected.
Comparator Function Enable.
This bit enables the comparator function for PCA module n when set to 1.
Capture Positive Function Enable.
This bit enables the positive edge capture for PCA module n when set to 1.
Capture Negative Function Enable.
This bit enables the negative edge capture for PCA module n when set to 1.
Match Function Enable.
This bit enables the match function for PCA module n when set to 1. When enabled,
matches of the PCA counter with a module's capture/compare register cause the CCFn
bit in PCA0MD register to be set to logic 1.
Toggle Function Enable.
This bit enables the toggle function for PCA module n when set to 1. When enabled,
matches of the PCA counter with a module's capture/compare register cause the logic
level on the CEXn pin to toggle. If the PWMn bit is also set to logic 1, the module oper-
ates in Frequency Output Mode.
Pulse Width Modulation Mode Enable.
This bit enables the PWM function for PCA module n when set to 1. When enabled, a
pulse width modulated signal is output on the CEXn pin. 8 to 11-bit PWM is used if
PWM16n is cleared; 16-bit mode is used if PWM16n is set to logic 1. If the TOGn bit is
also set, the module operates in Frequency Output Mode.
Capture/Compare Flag Interrupt Enable.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
ECOMn
R/W
6
0
,
PCA0CPM1 = F
CAPPn
R/W
,
5
0
PCA0CPM1 = 0xDB
CAPNn
R/W
Rev. 1.0
4
0
,
PCA0CPM2 = F
Function
,
PCA0CPM2 = 0xDC
MATn
R/W
3
0
TOGn
R/W
2
0
PWMn
R/W
1
0
ECCFn
R/W
0
0
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