M95512-RMN6TP STMicroelectronics, M95512-RMN6TP Datasheet - Page 18
![IC EEPROM 512KBIT 2MHZ 8SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M95512-RMN6TP
Manufacturer Part Number
M95512-RMN6TP
Description
IC EEPROM 512KBIT 2MHZ 8SOIC
Manufacturer
STMicroelectronics
Specifications of M95512-RMN6TP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
512K (64K x 8)
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Density
512Kb
Interface Type
Serial (SPI)
Organization
64Kx8
Access Time (max)
150ns
Frequency (max)
2MHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6356-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M95512-RMN6TP
Manufacturer:
TDK
Quantity:
324
Instructions
6.1
6.2
18/48
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven
high.
Figure 8.
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
●
●
●
●
Figure 9.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion.
Figure
Write Enable (WREN) sequence
Figure
Write Disable (WRDI) sequence
S
C
D
Q
S
C
D
Q
8, to send this instruction to the device, Chip Select (S) is driven low,
9, to send this instruction to the device, Chip Select (S) is driven low,
Doc ID 11124 Rev 14
High Impedance
0
1
High Impedance
0
2
Instruction
1
3
2
Instruction
4
3
5
4
6
5
7
6
M95512-DR, M95512-W, M95512-R
7
AI02281E
AI03750D