W25Q16BVSSIG Winbond Electronics, W25Q16BVSSIG Datasheet - Page 52
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W25Q16BVSSIG
Manufacturer Part Number
W25Q16BVSSIG
Description
IC SPI FLASH 16MBIT 8SOIC
Manufacturer
Winbond Electronics
Datasheet
1.W25Q16BVSFIG.pdf
(68 pages)
Specifications of W25Q16BVSSIG
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (2M x 8)
Speed
104MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W25Q16BVSSIG
Manufacturer:
WINBOND
Quantity:
9 270
Company:
Part Number:
W25Q16BVSSIG
Manufacturer:
WINBOND
Quantity:
20 655
Part Number:
W25Q16BVSSIG
Manufacturer:
WINBOND/华邦
Quantity:
20 000
11.2.32 Continuous Read Mode Reset (FFh or FFFFh)
For Fast Read Dual/Quad I/O operations, “Continuous Read Mode” Bits (M7-0) are implemented to
further reduce instruction overhead. By setting the (M7-0) to “Ax” hex, the next Fast Read Dual/Quad I/O
operation does not require the BBh/EBh/E7h/E3h instruction code (See 11.2.13 - 11.2.16 for detail
descriptions).
If the system controller is Reset during operation it will likely send a standard SPI instruction, such
as Read ID (9Fh) or Fast Read (0Bh), to the W25Q16BV. However, as with most SPI Serial Flash
memories, the W25Q16BV does not have a hardware Reset pin, so if Continuous Read Mode bits are set
to “Ax” hex, the W25Q16BV will not recognize any standard SPI instructions. To address this possibility, it
is recommended to issue a Continuous Read Mode Reset instruction as the first instruction after a
system Reset. Doing so will release the Continuous Read Mode from the “Ax” hex state and allow
Standard SPI instructions to be recognized. The Continuous Read Mode Reset instruction is shown in
figure 31.
To reset “Continuous Read Mode” during Quad I/O operation, only eight clocks are needed. The
instruction is “FFh”. To reset “Continuous Read Mode” during Dual I/O operation, sixteen clocks are
needed to shift in instruction “FFFFh”.
/CS
/CS
CLK
CLK
IO
IO
IO
IO
IO
IO
IO
IO
0
0
1
1
2
2
3
3
Mode 3
Mode 3
Mode 0
Mode 0
Figure 31. Continuous Read Mode Reset for Fast Read Dual/Quad I/O
0
0
1
1
Mode Bit Reset
Mode Bit Reset
2
2
for Quad I/O
for Quad I/O
3
3
FFh
FFh
4
4
5
5
6
6
- 52 -
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
7
7
8
8
9
9
10
10
11
11
Mode Bit Reset
Mode Bit Reset
FFh
FFh
for Dual I/O
for Dual I/O
12
12
13
13
14
14
15
15
W25Q16BV
Mode 3
Mode 3
Mode 0
Mode 0