M27C1001-12F1 STMicroelectronics, M27C1001-12F1 Datasheet - Page 6

• Manufacturer Part Number: M27C1001-12F1
• Description: IC EPROM 1MBIT 120NS 32CDIP
• Manufacturer: STMicroelectronics

Specifications of M27C1001-12F1

• Format - Memory: EPROMs
• Memory Type: UV EPROM
• Memory Size: 1M (128K x 8)
• Speed: 120ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-CDIP (0.600", 15.24mm) Window
• Capacitance, Input: 6 pF
• Capacitance, Output: 12 pF
• Current, Input, Leakage: ±10 μA (Read)
• Current, Operating: 30 mA (Read)
• Current, Output, Leakage: ±10 μA (Read)
• Current, Supply: 30 mA
• Density: 1M
• Organization: 128K×8
• Package Type: FDIP32W
• Temperature, Operating: 0 to +70 °C
• Temperature, Operating, Maximum: 70 °C
• Temperature, Operating, Minimum: 0 °C
• Time, Access: 120 ns
• Time, Fall: ≤20 ns
• Time, Programmable: 100 μs
• Time, Rise: ≤20 ns
• Voltage, Input, High: 6 V (Read)
• Voltage, Input, High Level: 2 V (Min.)
• Voltage, Input, Low: 0.8 V (Read)
• Voltage, Input, Low Level: -0.3 V (Max.)
• Voltage, Output, High: 4.3 V (Read)
• Voltage, Output, Low: 0.4 V (Read)
• Voltage, Programmable: 11.5 V (Min.)
• Voltage, Supply: 5 V
• Memory Configuration: 128K X 8
• Access Time: 120ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: DIP
• No. Of Pins: 32
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1631-5

M27C1001
Table 8B. Read Mode AC Characteristics
(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; V
Note: 1. V
Figure 5. Read Mode AC Waveforms
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
6/17
t
t
Symbol
EHQZ
GHQZ
t
t
t
t
GLQV
AXQX
AVQV
ELQV
2. Sampled only, not 100% tested.
(2)
(2)
CC
Q0-Q7
A0-A16
E
G
must be applied simultaneously with or before V
t
t
ACC
t
t
t
t
Alt
OE
OH
CE
DF
DF
Address Valid to
Output Valid
Chip Enable Low to
Output Valid
Output Enable Low
to Output Valid
Chip Enable High to
Output Hi-Z
Output Enable High
to Output Hi-Z
Address Transition
to Output Transition
Parameter
CC
, has three seg-
tAVQV
tELQV
E = V
E = V
Test Condition
tGLQV
VALID
G = V
G = V
E = V
E = V
IL
IL
(1)
, G = V
, G = V
IL
IL
PP
IL
IL
CC
and removed simultaneously or after V
IL
IL
= 5V ± 5% or 5V ± 10%; V
Min Max Min Max Min Max Min Max
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between V
and V
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between V
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
0
0
0
-80
80
80
40
30
30
SS
. This should be a high frequency capaci-
tAXQX
0
0
0
-90
M27C1001
CC
90
90
45
30
30
tEHQZ
tGHQZ
VALID
and V
PP
0
0
0
PP
-10
.
SS
= V
100
100
50
30
30
for every eight devic-
CC
)
AI00713B
-12/-15/
0
0
0
-20/-25
Hi-Z
120
120
60
40
40
Unit
ns
ns
ns
ns
ns
ns
CC