CY7C1339G-133AXC Cypress Semiconductor Corp, CY7C1339G-133AXC Datasheet - Page 13

• Manufacturer Part Number: CY7C1339G-133AXC
• Description: IC SRAM 4MBIT 133MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1339G-133AXC

• Memory Size: 4M (128K x 32)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 4 ns
• Maximum Clock Frequency: 133 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 225 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2112; CY7C1339G-133AXC

Switching Waveforms
Write Cycle Timing
Notes
Document Number: 38-05520 Rev. *I
20. On this diagram, when CE is LOW, CE
21. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW
Data Out (Q)
Data In (D)
ADDRESS
BW[A :D]
ADSC
ADSP
BWE,
ADV
CLK
GW
OE
CE
BURST READ
High-Z
t ADS
t CES
t AS
[20, 21]
A1
t ADH
t CEH
t AH
t CH
t
OEHZ
Byte write signals are
ignored for first cycle when
ADSP initiates burst
t CYC
t ADS
t CL
t DS
Single WRITE
(continued)
D(A1)
1
t ADH
t DH
is LOW, CE
A2
2
is HIGH and CE
D(A2)
DON’T CARE
3
t WES
D(A2 + 1)
is LOW. When CE is HIGH, CE
BURST WRITE
t WEH
UNDEFINED
D(A2 + 1)
[A:D]
ADV suspends burst
LOW.
D(A2 + 2)
ADSC extends burst
1
is HIGH or CE
D(A2 + 3)
t ADS
2
A3
is LOW or CE
D(A3)
t ADH
t
ADVS
t WES
Extended BURST WRITE
D(A3 + 1)
t
t WEH
3
ADVH
is HIGH.
CY7C1339G
D(A3 + 2)
Page 13 of 21
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