CY7C1168V18-400BZXC Cypress Semiconductor Corp, CY7C1168V18-400BZXC Datasheet - Page 10

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CY7C1168V18-400BZXC

Manufacturer Part Number
CY7C1168V18-400BZXC
Description
IC SRAM 18MBIT 400MHZ 165LFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1168V18-400BZXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
18M (1M x 18)
Speed
400MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1168V18-400BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Write Cycle Descriptions
The write cycle descriptions of CY7C1166V18 and CY7C1168V18 follows.
The write cycle descriptions of CY7C1177V18 follows.
Note
Document Number: 001-06620 Rev. *D
8. Is based on a write cycle was initiated in accordance with the Write Cycle Description Truth Table. Alter NWS
BWS
NWS
BWS
H
H
H
H
portions of a write cycle, as long as the setup and hold requirements are achieved.
L
L
L
L
H
H
L
L
0
0
0
/
BWS
NWS
L-H
L-H
H
H
H
H
L
L
L
L
K
1
1
/
L–H
L–H
L–H
L–H
K
L-H
L-H
K
L–H During the Data portion of a write sequence:
L–H During the Data portion of a write sequence:
L–H No data is written into the devices during this portion of a write operation.
L-H During the Data portion of a write sequence:
K
During the Data portion of a Write sequence, the single byte (D
During the Data portion of a Write sequence, the single byte (D
No data is written into the device during this portion of a Write operation.
No data is written into the device during this portion of a Write operation.
During the Data portion of a write sequence:
CY7C1166V18 − both nibbles (D
CY7C1168V18 − both bytes (D
CY7C1166V18 − both nibbles (D
CY7C1168V18 − both bytes (D
During the Data portion of a write sequence:
CY7C1166V18 − only the lower nibble (D
CY7C1168V18 − only the lower byte (D
CY7C1166V18 − only the lower nibble (D
CY7C1168V18 − only the lower byte (D
During the Data portion of a write sequence:
CY7C1166V18 − only the upper nibble (D
CY7C1168V18 − only the upper byte (D
CY7C1166V18 − only the upper nibble (D
CY7C1168V18 − only the upper byte (D
No data is written into the devices during this portion of a write operation.
[2, 8]
[17:0]
[17:0]
[7:0]
[7:0]
) are written into the device.
) are written into the device.
) are written into the device.
) are written into the device.
[8:0]
[8:0]
[17:9]
[17:9]
[3:0]
[3:0]
[7:4]
[7:4]
Comments
) is written into the device, D
) is written into the device, D
[2, 8]
) is written into the device, D
) is written into the device, D
Comments
) is written into the device, D
) is written into the device, D
) is written into the device, D
) is written into the device, D
CY7C1166V18, CY7C1177V18
CY7C1168V18, CY7C1170V18
0
, NWS
[8:0]
[8:0]
1
) is written into the device.
) is written into the device.
, BWS
0
, BWS
[17:9]
[17:9]
[8:0]
[8:0]
[7:4]
[7:4]
[3:0]
[3:0]
1
, BWS
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
2
, and BWS
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