CY7C1460AV25-200BZC Cypress Semiconductor Corp, CY7C1460AV25-200BZC Datasheet - Page 20

• Manufacturer Part Number: CY7C1460AV25-200BZC
• Description: IC SRAM 36MBIT 200MHZ 165LFBGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1460AV25-200BZC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 36M (1M x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 165-LFBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Document #: 38-05354 Rev. *D
Switching Waveforms
Read/Write/Timing
NOP, STALL and DESELECT Cycles
Notes:
23. For this waveform ZZ is tied low.
24. When CE is LOW, CE
25. Order of the Burst sequence is determined by the status of the MODE (0=Linear, 1=Interleaved).Burst operations are optional.
26. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle.
In-Out (DQ)
ADDRESS
ADV/LD
In-Out (DQ)
Data
BWx
CEN
CLK
WE
ADDRESS
CE
ADV/LD
Data
BW
CEN
CLK
WE
OE
CE
WRITE
D(A1)
x
1
A1
t
t
t
[23, 24, 25]
CENS
CES
AS
1
is LOW, CE
WRITE
D(A1)
A1
1
t
t
CENH
t
AH
CEH
READ
Q(A2)
A2
2
2
is HIGH and CE
WRITE
D(A2)
2
A2
t
CH
t CYC
[23, 24, 26]
t
STALL
t
DS
CL
D(A2+1)
3
BURST
WRITE
D(A1)
3
3
t
DH
is LOW. When CE is HIGH,CE
D(A1)
DON’T CARE
Q(A3)
READ
D(A2)
Q(A3)
A3
READ
4
A3
4
Q(A2)
D(A2+1)
WRITE
READ
Q(A4)
D(A4)
A4
DON’T CARE
A4
5
5
t
t
CO
CLZ
UNDEFINED
1
Q(A4+1)
BURST
is HIGH or CE
READ
Q(A3)
STALL
6
t
DOH
6
Q(A3)
t
OEHZ
WRITE
D(A5)
Q(A4)
A5
2
7
is LOW or CE
UNDEFINED
NOP
7
t
OEV
t
OELZ
Q(A6)
Q(A4+1)
READ
A6
8
t
t
DOH
CHZ
3
Q(A5)
D(A4)
READ
is HIGH.
A5
8
WRITE
D(A7)
CY7C1460AV25
CY7C1462AV25
CY7C1464AV25
D(A5)
9
A7
DESELECT
9
DESELECT
10
Q(A6)
Page 20 of 27
CONTINUE
DESELECT
Q(A5)
10
t
CHZ
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