DS2433S+ Maxim Integrated Products, DS2433S+ Datasheet - Page 11

IC EEPROM 4KBIT 8SOIC

DS2433S+

Manufacturer Part Number
DS2433S+
Description
IC EEPROM 4KBIT 8SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2433S+

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (256 x 16)
Interface
1-Wire Serial
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Organization
4 K x 1
Interface Type
1-Wire
Supply Voltage (max)
6 V
Supply Voltage (min)
2.8 V
Maximum Operating Current
500 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Speed
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Figure 8. HARDWARE CONFIGURATION
1-Wire BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances the
DS2433 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system
is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling
(signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during
specific time slots that are initiated on the falling edge of sync pulses from the bus master.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS2433 is open drain with an internal circuit equivalent
to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At
regular speed the 1-Wire bus has a maximum data rate of 16.3kbps. The speed can be boosted to 142kbps
by activating the Overdrive Mode. The 1-Wire bus requires a pullup resistor of approximately 5k.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 16s (Overdrive Speed) or more than 120s (regular speed), one or more devices on the
bus may be reset.
TRANSACTION SEQUENCE
The protocol for accessing the DS2433 via the 1-Wire port is as follows:
 Initialization
 ROM Function Command
 Memory Function Command
 Transaction/Data
*5k IS ADEQUATE FOR READING THE DS2433. TO WRITE TO A SINGLE DEVICE, A 2.2k RESISTOR AND V
SUFFICIENT. FOR WRITING MULTIPLE DS2433s SIMULTANEOUSLY OR OPERATION AT LOW V
BY A LOW-IMPEDANCE PULLUP TO V
COMMUNICATION SPEED AND THE BUS LOAD CHARACTERISTICS, THE OPTIMAL PULLUP RESISTOR (R
1.5k TO 5k RANGE.
PUP
WHILE THE DEVICE COPIES THE SCRATCHPAD TO EEPROM. DEPENDING ON THE 1-Wire
R
PU
*
11 of 23
PUP
, THE R
PU
PU
) VALUE WILL BE IN THE
PUP
SHOULD BE BYPASSED
OF AT LEAST 4.0V IS

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