ZLF645S2864GP0001T Maxim Integrated, ZLF645S2864GP0001T Datasheet - Page 165

• Manufacturer Part Number: ZLF645S2864GP0001T
• Description: 8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
• Manufacturer: Maxim Integrated

Specifications of ZLF645S2864GP0001T

• Core: Z8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 1 KB
• Operating Supply Voltage: 2 V to 3.6 V
• Interface Type: UART
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 8 bit, 1 x 16 bit
• Processor Series: ZLF645
• Program Memory Type: Flash

.
Table 74. Symbolic Notation for Operands
19-4572; Rev 0; 4/09
Symbol
cc
IM
r1
r2
rr1
rr2
R1
R2
Z8 LXMC CPU Programming Summary
Addressing Notation
Assembly
Operand
–
#n
R n
RR n
%
aa
The following sections provide a summary of information useful for programming the
Z8 LXMC CPU included in this device. For more details on the Z8 LXMC CPU and its
instruction set, refer to Z8
Table 74
variable n represents a decimal number; aa represents a hexadecimal address; and LABEL
represents a label defined elsewhere in the assembly source.
In reference notation, only lowercase is used to distinguish 4-bit addressed working 
registers (r1, r2) from 8-bit addressed registers (R1, R2). The numerals 1 and 2, 
respectively, indicate whether the register is used for destination or source addressing.
summarizes Z8 LXMC CPU addressing modes and symbolic notation. The text
Description
Condition Code
cc represents a condition code mnemonic. See
Immediate Data
IM represents an Immediate Data value, prefixed by # in assembly language
where n = 0 to 255.
The immediate value follows the instruction opcode in Program Memory.
Working Register
r1 or r2 represents the name, R
The equivalent 12-bit address is {RP[3:0], RP[7:4], n }.
Working Register Pair
rr1 or rr2 represents th e name, R
n = 0, 2, 4,..., 14. The equivalent 12-bit address is {RP[3:0], RP[7:4], n }.
Register
R1 or R2 represents an 8-bit register address. For addresses 00h–DFh or 
F0h–FFh , the equivalent 12-bit address is {RP[3:0], %
E0h–EFh (escaped mode), the equivalent 12-bit address is 
{RP[3:0], RP[7:4], %
®
LXMC CPU Core User Manual (UM0215).
aa
[3:0]}.
n
, of a working register, where n = 0, 1, 2,..., 15.
n
, of a working registe r pair, wh ere
Z8 LXMC CPU Programming Summary
Condition Codes
ZLF645 Series Flash MCUs
Product Specification
aa
}. For addresses 
on page 161.
157