AT25DF021-MH-T Atmel, AT25DF021-MH-T Datasheet - Page 22

IC FLASH 2MBIT 70MHZ 8UDFN

AT25DF021-MH-T

Manufacturer Part Number
AT25DF021-MH-T
Description
IC FLASH 2MBIT 70MHZ 8UDFN
Manufacturer
Atmel
Datasheet

Specifications of AT25DF021-MH-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (256K x 8)
Speed
70MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11. Status Register Commands
11.1
Table 11-1.
Notes:
22
Bit
3:2
7
6
5
4
1
0
(1)
Read Status Register
1. Only bit 7 of the Status Register will be modified when using the Write Status Register command.
2. R/W = Readable and writable
RDY/BSY
AT25DF021
SPRL
WPP
SWP
WEL
RES
EPE
R = Readable only
Status Register Format
Sector Protection Registers Locked
Reserved for future use
Erase/Program Error
Write Protect (WP) Pin Status
Software Protection Status
Write Enable Latch Status
Ready/Busy Status
The Status Register can be read to determine the device’s ready/busy status, as well as the sta-
tus of many other functions such as Hardware Locking and Software Protection. The Status
Register can be read at any time, including during an internally self-timed program or erase
operation.
To read the Status Register, the CS pin must first be asserted and the opcode of 05h must be
clocked into the device. After the opcode has been clocked in, the device will begin outputting
Status Register data on the SO pin during every subsequent clock cycle. After the last bit (bit 0)
of the Status Register has been clocked out, the sequence will repeat itself starting again with bit
7 as long as the CS pin remains asserted and the clock pin is being pulsed. The data in the Sta-
tus Register is constantly being updated, so each repeating sequence will output new data.
Deasserting the CS pin will terminate the Read Status Register operation and put the SO pin
into a high-impedance state. The CS pin can be deasserted at any time and does not require
that a full byte of data be read.
Name
Type
R/W
R
R
R
R
R
R
(2)
00
01
10
11
0
1
0
0
1
0
1
0
1
0
1
Sector Protection Registers are unlocked (default).
Sector Protection Registers are locked.
Reserved for future use.
Erase or program operation was successful.
Erase or program error detected.
WP is asserted.
WP is deasserted.
All sectors are software unprotected (all Sector
Protection Registers are 0).
Some sectors are software protected. Read
individual Sector Protection Registers to determine
which sectors are protected.
Reserved for future use.
All sectors are software protected (all Sector
Protection Registers are 1 – default).
Device is not write enabled (default).
Device is write enabled.
Device is ready.
Device is busy with an internal operation.
Description
3677D–DFLASH–04/09

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