EVAL-ADXL350Z Analog Devices, EVAL-ADXL350Z Datasheet - Page 29

• Manufacturer Part Number: EVAL-ADXL350Z
• Description: Acceleration Sensor Development Tools EB
• Manufacturer: Analog Devices

Specifications of EVAL-ADXL350Z

• Rohs: yes
• Interface Type: I2C, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Product: Evaluation Boards
• Factory Pack Quantity: 1

Data Sheet
A double tap event can also be invalidated if acceleration above
the threshold is detected at the start of the time window for the
second tap (set by the window register). This results in an invalid
double tap at the start of this window, as shown in Figure 62.
Additionally, a double tap event can be invalidated if an accel-
eration exceeds the time limit for taps (set by the DUR register),
resulting in an invalid double tap at the end of the DUR time
limit for the second tap event, also shown in Figure 62.
Single taps, double taps, or both can be detected by setting the
respective bits in the INT_ENABLE register (Address 0x2E).
Control over participation of each of the three axes in single tap/
double tap detection is exerted by setting the appropriate bits in
the TAP_AXES register (Address 0x2A). For the double tap
function to operate, both the latent and window registers must
be set to a nonzero value.
Every mechanical system has somewhat different single tap/double
tap responses based on the mechanical characteristics of the
system. Therefore, some experimentation with values for the
latent, window, and THRESH_TAP registers is required. In
general, a good starting point is to set the latent register to a
value greater than 0x10, to set the window register to a value
greater than 0x10, and to set the THRESH_TAP register to be
greater than 3 g. Setting a very low value in the latent, window, or
THRESH_TAP register may result in an unpredictable response
due to the accelerometer picking up echoes of the tap inputs.
After a tap interrupt has been received, the first axis to exceed
the THRESH_TAP level is reported in the ACT_TAP_STATUS
register (Address 0x2B). This register is never cleared, but is
overwritten with new data.
TIME LIMIT
FOR TAPS
(DUR)
Figure 62. Tap Interrupt Function with Invalid Double Taps
LATENCY
(LATENT)
TIME
DOUBLE TAP AT
INVALIDATES
END OF DUR
TIME LIMIT
FOR TAPS
(DUR)
SECOND TAP (WINDOW)
TIME LIMIT
FOR TAPS
TIME WINDOW FOR
(DUR)
INVALIDATES DOUBLE TAP
AT START OF WINDOW
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THRESHOLD
The lower output data rates are achieved by decimating a
common sampling frequency inside the device. The activity,
free-fall, and single tap/double tap detection functions are
performed using unfiltered data. Since the output data is
filtered, the high frequency and high g data that is used to
determine activity, free-fall, and single tap/double tap events may
not be present if the output of the accelerometer is examined.
This may result in trigger events being detected when acceleration
does not appear to trigger an event because the unfiltered data
may have exceeded a threshold or remained below a threshold
for a certain period of time while the filtered output data has
not exceeded such a threshold.
LINK MODE
The function of the link bit is to reduce the number of activity
interrupts that the processor must service by setting the device
to look for activity only after inactivity. For proper operation of
this feature, the processor must still respond to the activity and
inactivity interrupts by reading the INT_SOURCE register
(Address 0x30) and, therefore, clearing the interrupts. If an activity
interrupt is not cleared, the part cannot go into autosleep mode.
The asleep bit in the ACT_TAP_STATUS register (Address 0x2B)
indicates if the part is asleep.
SLEEP MODE VS. LOW POWER MODE
In applications where a low data rate is sufficient and low power
consumption is desired, it is recommended that the low power
mode be used in conjunction with the FIFO. The sleep mode, while
offering a low data rate and low average current consumption,
suppresses the DATA_READY interrupt, preventing the accelero-
meter from sending an interrupt signal to the host processor
when data is ready to be collected. In this application, setting
the part into low power mode (by setting the LOW_POWER bit
in the BW_RATE register) and enabling the FIFO in FIFO mode to
collect a large value of samples reduces the power consumption
of the
while the FIFO is filling up.
OFFSET CALIBRATION
Accelerometers are mechanical structures containing elements
that are free to move. These moving parts can be very sensitive
to mechanical stresses, much more so than solid-state electronics.
The 0 g bias or offset is an important accelerometer metric because
it defines the baseline for measuring acceleration. Additional
stresses can be applied during assembly of a system containing
an accelerometer. These stresses can come from, but are not
limited to, component soldering, board stress during mounting,
and application of any compounds on or over the component. If
calibration is deemed necessary, it is recommended that calibration
be performed after system assembly to compensate for these effects.
A simple method of calibration is to measure the offset while
assuming that the sensitivity of the
Table 1. The offset can then be automatically accounted for by
ADXL350
and allows the host processor to go to sleep
ADXL350
is as specified in
ADXL350