KIT33800EKEVME Freescale Semiconductor, KIT33800EKEVME Datasheet - Page 20
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KIT33800EKEVME
Manufacturer Part Number
KIT33800EKEVME
Description
Power Management IC Development Tools ENGINE CONTROL INTEGRATE
Manufacturer
Freescale Semiconductor
Type
PMIC Solutionsr
Datasheet
1.KIT33800EKEVME.pdf
(39 pages)
Specifications of KIT33800EKEVME
Rohs
yes
Product
Evaluation Kits
Tool Is For Evaluation Of
MC33800
Input Voltage
5 V
Output Voltage
9 V
Output Current
0 mA to 1075 mA
SPI AND MCU INTERFACE DESCRIPTION
microcontroller unit (MCU) using 16 bit Serial Peripheral
Interface (SPI) protocol. SPI serial clock frequencies up to
4.0MHz may be used when programming and reading output
status information (production tested at 1MHz).
illustrates the serial peripheral interface (SPI) configuration
between an MCU and one 33800.
input pin. As data is being clocked into the SI pin, status
information is being clocked out of the device by the SO
output pin. The response data received by the MCU during
SPI communication depends on the previous SPI message
sent to the device. The next SO response data is listed at the
bottom of each command table
12, on page 25, Table 22, on page 30 Table 23, on page
Table 26, on page
SPI Integrity Check
initial power-up of the VDD and EN pins is recommended.
After initial system start-up or reset, the MCU will write one
32-bit pattern to the 33800. The first 16-bits read by the MCU
will be the fault status (SO message 1) of the outputs. The
second 16-bits will be the same bit pattern sent by the MCU.
By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. The second 16-bit pattern the MCU
sends to the device is the a command word and will be
operated on by the device accordingly on rising edge of
implemented to ensure integrity of SPI communications. SPI
messages consisting of 16 SCLK pulses and multiples of 8
clock pulses thereafter will be acknowledged. SPI messages
consisting of other than 16 + multiples of 8 SCLK pulses will
be ignored by the device.
system. Multiple ICs may be SPI-configured in parallel or
serial.
20
33800
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
The 33800 device directly interfaces to a 3.3 or 5.0V
Command data is sent to the 33800 device through the SI
Checking the integrity of the SPI communication with the
Important A SCLK pulse count strategy has been
Two or more 33800 devices may be used in a module
Microcontroller
Shift Register
Figures 7
Figure 6. SPI Interface with Microprocessor
Receive
Parallel
Buffer
Ports
and
34.
8
MOSI
MISO
SCLK
show the configurations. When using
( Table 7, on page 22, Table
SO
CS
SI
LOGIC COMMANDS AND REGISTERS
16-Bit Shift Register
33800
To Logic
Figure 6
CS
31,
.
the serial configuration, 32-clock cycles are required to
transfer data in / out of the ICs.
PROGRAMMABLE PWM GATE DRIVER OUTPUTS
driver outputs. Each driver may be controlled directly from the
MCU or may be programmed through the SPI for a specific
frequency and duty cycle.
Microcontroller
The 33800 device is designed with six flexible PWM gate
The pre-drivers are designed with four diagnostic features:
Figure 7. SPI Parallel Interface with Microprocessor
Microcontroller
Figure 8. SPI Serial Interface with Microprocessor
Shift Register
Shift Register
Parallel
Parallel
Ports
Ports
SCLK
MOSI
MISO
SCLK
MOSI
MISO
Analog Integrated Circuit Device Data
Freescale Semiconductor
SI
SO
SCLK
CS
SI
SO
SCLK
CS
SI
SO
SCLK
CS
SI
SO
SCLK
CS
33800
33800
33800
33800