ADP2380-EVALZ Analog Devices, ADP2380-EVALZ Datasheet - Page 24

• Manufacturer Part Number: ADP2380-EVALZ
• Description: Power Management IC Development Tools 20V 4A Evaluation Board
• Manufacturer: Analog Devices
• Type: DC/DC Converters, Regulators & Controllersr
• Series: ADP2380r

Specifications of ADP2380-EVALZ

• Rohs: yes
• Tool Is For Evaluation Of: ADP2380
• Input Voltage: 4.5 V to 20 V
• Factory Pack Quantity: 1

ADP2380
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Good circuit board layout is essential for obtaining the best
performance from the ADP2380. Poor printed circuit board
(PCB) layout degrades the output regulation as well as the
electromagnetic interface (EMI) and electromagnetic
compatibility (EMC) performance. Figure 38 shows a PCB
layout example. For optimum layout, use the following guidelines:
•
•
•
Use separate analog ground and power ground planes.
Connect the ground reference of sensitive analog circuitry,
such as output voltage divider components, to analog
ground. In addition, connect the ground reference of
power components, such as input and output capacitors
and a low-side MOSFET, to power ground. Connect both
ground planes to the exposed pad of the ADP2380.
Place the input capacitor, inductor, low-side MOSFET, and
output capacitor as close to the IC as possible, and use
short traces.
Ensure that the high current loop traces are as short and
as wide as possible. Make the high current path from the
input capacitor through the inductor, the output capacitor,
and the power ground plane back to the input capacitor as
short as possible. To accomplish this, ensure that the input
and output capacitors share a common power ground plane.
V
C
IN
IN
R
C
OSC
SS
1
2
3
4
5
6
7
8
Figure 37. High Current Path in the PCB Circuit
PVIN
PVIN
UVLO
PGOOD
RT
SYNC
EN/SS
COMP
C
C_EA
ADP2380
C
CP_EA
Rev. 0 | Page 24 of 28
R
C_EA
PGND
VREG
GND
BST
SW
SW
LD
FB
•
•
•
16
15
14
13
12
11
10
9
C
In addition, ensure that the high current path from the
power ground plane through the external MOSFET,
inductor, and output capacitor back to the power ground
plane is as short as possible by tying the MOSFET source
node to the PGND plane as close as possible to the input
and output capacitors.
Make the low-side driver path from the LD pin of the
ADP2380
the PGND pin of the
use a wide trace for better noise immunity.
Connect the exposed pad of the
plane to maximize its power dissipation capability for
better thermal dissipation.
Place the feedback resistor divider network as close as
possible to the FB pin to prevent noise pickup. Try to
minimize the length of the trace that connects the top of
the feedback resistor divider to the output while keeping
the trace away from the high current traces and the
switching node to avoid noise pickup. To further reduce
noise pickup, place an analog ground plane on either side
of the FB trace and ensure that the trace is as short as
possible to reduce parasitic capacitance pickup.
C
VREG
BST
FET
L
to the external MOSFET gate node and back to
R
R
TOP
BOT
C
V
OUT
OUT
ADP2380
as short as possible, and
ADP2380
Data Sheet
to a large copper