ADP2380-EVALZ Analog Devices, ADP2380-EVALZ Datasheet - Page 6

• Manufacturer Part Number: ADP2380-EVALZ
• Description: Power Management IC Development Tools 20V 4A Evaluation Board
• Manufacturer: Analog Devices
• Type: DC/DC Converters, Regulators & Controllersr
• Series: ADP2380r

Specifications of ADP2380-EVALZ

• Rohs: yes
• Tool Is For Evaluation Of: ADP2380
• Input Voltage: 4.5 V to 20 V
• Factory Pack Quantity: 1

ADP2380
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1, 2
3
4
5
6
7
8
9
10
11
12
13
14, 15
16
17
Mnemonic
PVIN
UVLO
PGOOD
RT
SYNC
EN/SS
COMP
FB
GND
PGND
VREG
LD
SW
BST
EPAD
Description
Power Input. Connect PVIN to the input power source and connect a bypass capacitor between this pin
and PGND.
Undervoltage Lockout Pin. An external resistor divider can be used to set the turn-on threshold.
Power-Good Output (Open Drain). It is recommended that a pull-up resistor of 10 kΩ to 100 kΩ be
connected to PGOOD.
Frequency Setting. Connect a resistor between RT and GND to program the switching frequency
between 250 kHz and 1.4 MHz. If the RT pin is connected to GND, the switching frequency is set to 290 kHz.
If the RT pin is open, the switching frequency is set to 540 kHz.
Synchronization Input. Connect this pin to an external clock to synchronize the switching frequency
between 250 kHz and 1.4 MHz (see the Oscillator section and the Synchronization section for details).
Enable (EN). When this pin voltage falls below 0.5 V, the regulator is disabled.
Soft Start (SS). This pin can also be used to set the soft start time. Connect a capacitor from SS to GND to
program the slow soft start time. If this pin is open, the regulator is enabled and uses the internal soft start.
Error Amplifier Output. Connect an RC network from COMP to FB.
Feedback Voltage Sense Input. Connect this pin to a resistor divider from V
Analog Ground. Connect this pin to the ground plane.
Power Ground. Connect this pin to the source of the synchronous N-channel MOSFET.
Internal 8 V Regulator Output. Place a 1 µF ceramic capacitor between this pin and GND.
Low-Side Gate Driver Output. Connect this pin to the gate of the synchronous N-MOSFET.
Switch Node Output. Connect this pin to the output inductor.
Supply Rail for the High-Side Gate Drive. Place a 0.1 µF ceramic capacitor between SW and BST.
Exposed Pad. The exposed pad should be soldered to a large external copper ground plane underneath
the IC for thermal dissipation.
NOTES
1. THE EXPOSED PAD SHOULD BE SOLDERED
TO A LARGE EXTERNAL COPPER GROUND PLANE
UNDERNEATH THE IC FOR THERMAL DISSIPATION.
PGOOD
Figure 3. Pin Configuration (Top View)
EN/SS
COMP
UVLO
SYNC
PVIN
PVIN
RT
1
2
3
4
5
6
7
8
Rev. 0 | Page 6 of 28
(Not to Scale)
ADP2380
TOP VIEW
16
15
14
13
12
11
10
9
BST
SW
SW
LD
VREG
PGND
GND
FB
OUT
.
Data Sheet