2ED100E12-F2_EVAL Infineon Technologies, 2ED100E12-F2_EVAL Datasheet - Page 10

no-image

2ED100E12-F2_EVAL

Manufacturer Part Number
2ED100E12-F2_EVAL
Description
Power Management IC Development Tools Eval Driver Board EconoDual
Manufacturer
Infineon Technologies
Datasheet
Both Driver Boards should be fastened by self taping screws and soldered to the auxiliary connectors on top
of the IGBT module.
Clearance and creepage distances for EconoDUAL™3 and EconoPACK™+ Driver Boards:
Primary/Secondary is not less than 8 mm and Secondary/Secondary is not less than 4 mm.
3
The following chapter describes the board´s operation in evaluation setup. Please note that the following
paragraphs describe the circuits of the 2ED100E12-F2 which has been modified (compared to the last
revision of this AN) to drive IGBT4 modules and to reduce the susceptibility to erroneous triggering of the
V
board provided in chapter 7 still represent the initial design.
3.1
The 2ED100E12-F2 and the 6ED100E12-F2 have an integrated DC/DC converter for each leg, which
generates the required secondary isolated unsymmetrical supply voltage of +16 V / -8 V. Top and Bottom
driver voltages are independently generated by using one unipolar input voltage of 15 V. Additionally, the
power supply is protected against gate – emitter short circuit of the IGBTs. In case of DC/DC converter
overload, the output voltage drops. This Under Voltage Detection function insures gate voltages within
specified range. The fault is reported to the driver’s primary side.
3.2
The Evaluation Driver Boards are dedicated for a half-bridge EconoDUAL™3 and sixpack EconoPACK™+
IGBT configuration, therefore it is necessary to connect two separate PWM signals or 6 separate PWM
signals. Individual signals for Top and Bottom IGBT are necessary if there is a half-bridge module or rather 6
dedicated signals if there is a sixpack module. The schematic for a single driver is depicted in Figure 6. The
signals need to have the correct dead time. Both Evaluation Driver Boards do not provide automatic dead
time generation and recommended minimum dead time t
tables 5 and 7 are used. If larger gate resistors are used please refer to [1].
Figure 6
The schematic in Figure 6 shows driver circuit with positive logic. IN+ is used as signal input whereas IN- is
used as enable signal. Therefore a +5 V signal on the IN+ input pin and a GND signal on the IN- input pin is
necessary to switch on the IGBT. To operate the whole circuit with negative logic the capacitors on the input
pins have to be exchanged. Otherwise this would cause an additional delay. IN+ will then operate as an
enable signal.
Application Note
cesat
-detection. Same changes may also be applied to the 6ED100E12-12-F2, but layout and part list of this
Application Note
Power Supply
Input logic – PWM signals
Schematic detail of the input circuit for a single driver.
Driver board for EconoDUAL™3 and EconoPACK™+
10
TD
is 1 µs, provided gate resistors like suggested in
Application Note
V1.2, 2009-08
AN2008-02

Related parts for 2ED100E12-F2_EVAL