M29W400FB55N3F NUMONYX, M29W400FB55N3F Datasheet

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... Top device code M29W800FT: 22D7h; M29W400FT: 00EEh – Bottom device code M29W800FB: 225Bh; M29W400FB: 00EFh RoHS packages available July 2010 M29W800FT M29W400FT M29W800FB M29W400FB Boot Block 3 V Supply Flash memory TSOP48 (N) 12 × TFBGA48 (ZA Automotive device grade 3: Automotive device grade Rev 5 FBGA 1/56 www.numonyx.com 1 ...

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Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Unlock Bypass Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.7 Chip Erase ...

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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in TSOP48 (12 × 20 mm) and TFBGA48 6 × (0.8 mm pitch) packages. The memory is supplied with all the bits erased (set to ’1’). Figure 1. ...

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Table 1. Signal names Signal name A0-A18 Address inputs DQ0-DQ7 Data inputs/outputs DQ8-DQ14 Data inputs/outputs DQ15A–1 Data input/output or address input E Chip Enable G Output Enable W Write Enable RP Reset/block temporary unprotect RB Ready/busy output BYTE Byte/word organization ...

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Figure 3. TSOP connections, 400FT/B 8/56 A15 1 48 A16 A14 BYTE A13 V SS A12 DQ15A–1 A11 DQ7 A10 DQ14 A9 DQ6 A8 DQ13 NC DQ5 NC DQ12 W DQ4 DQ11 ...

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Figure 4. BGA connections, 400FT A17 DQ0 DQ8 G G DQ9 DQ1 ...

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Figure 5. BGA connections, 800FT 10/ A17 A18 DQ0 DQ2 DQ5 DQ12 E ...

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Figure 6. Block addresses, 800FT/B(× 8) Top boot block addresses (x 8) FFFFFh 16 Kbyte FC000h FBFFFh 8 Kbyte FA000h F9FFFh 8 Kbyte F8000h F7FFFh 32 Kbyte F0000h EFFFFh 64 Kbyte E0000h 64 Kbyte blocks 1FFFFh 64 Kbyte 10000h 0FFFFh ...

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Figure 7. Block addresses, 800FT/B(× 16) Top boot block addresses (x 16) 7FFFFh 8 Kword 7E000h 7DFFFh 4 Kword 7D000h 7CFFFh 4 Kword 7C000h 7BFFFh 16 Kword 78000h 77FFFh 32 Kword 70000h 0FFFFh 32 Kword 08000h 07FFFh 32 Kword 00000h ...

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Figure 8. Block addresses, 400FT/B(× 8) Top boot block addresses (x 8) 7FFFFh 16 Kbyte 7C000h 7BFFFh 8 Kbyte 7A000h 79FFFh 8 Kbyte 78000h 77FFFh 32 Kbyte 70000h 6FFFFh 64 Kbyte 60000h 1FFFFh 64 Kbyte 10000h 0FFFFh 64 Kbyte 00000h ...

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... BYTE is Low except when stated explicitly otherwise. 2.5 Chip Enable (E) The Chip Enable, E, activates the memory, allowing bus read and bus write operations to be performed. When Chip Enable is High, V 2.6 Output Enable (G) The Output Enable, G, controls the bus read operation of the memory. ...

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... Write Enable (W) The Write Enable, W, controls the bus write operation of the memory’s command interface. 2.8 Reset/Block Temporary Unprotect (RP) The Reset/Block Temporary Unprotect pin can be used to apply a hardware reset to the memory or to temporarily unprotect all blocks that have been protected. ...

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... This prevents bus write operations from accidentally damaging the data LKO during power up, power down and power surges. If the program/erase controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1 µF capacitor should be connected between the V ground pin to decouple the current surges from the power supply ...

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... Enable are ignored by the memory and do not affect bus operations. 3.1 Bus read Bus read operations read from the memory cells, or specific registers in the command interface. A valid bus read operation involves setting the desired address on the address inputs, applying a Low signal, V Enable High, V ...

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... They require V applied to some pins. 3.7 Electronic signature The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in and Table 3, Bus operations ...

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Table 3. Bus operations, BYTE = V Operation E G Bus read Bus write Output disable X V Standby Read manufacturer code Read device code ...

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... From the auto select mode the manufacturer code can be read using a bus read operation with and manufacturer code for Numonyx is 0020h. The device code can be read using a bus read operation with other address bits may be set to either V 22D7h and for the M29W800FB is 225Bh. ...

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... Note that the Program command cannot change a bit set at ’0’ back to ’1’. One of the Erase commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. 4.4 Unlock Bypass command The Unlock Bypass command is used in conjunction with the Unlock Bypass Program command to program the memory ...

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... When an error occurs the memory will continue to output the status register. A Read/Reset command must be issued to reset the error condition and return to read mode. The Chip Erase command sets all of the bits in unprotected blocks of the memory to ’1’. All previous data is lost. 4.8 Block Erase command The Block Erase command can be used to erase a list of one or more blocks ...

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... Read CFI Query command The Read CFI Query command is used to read data from the common Flash interface (CFI) memory area. This command is valid when the device is in the read array mode, or when the device is in auto select mode. One bus write cycle is required to issue the Read CFI Query command. Once the command is issued subsequent bus read operations read from the common Flash Interface memory area ...

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Block Protect and Chip Unprotect commands Each block can be separately protected against accidental program or erase. The whole chip can be unprotected to allow the data inside the blocks to be changed. Block protect and chip unprotect operations ...

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Table 5. Commands, 8-bit mode, BYTE = V Command Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data 1 X Read/Reset 3 AAA Auto Select 3 AAA Program 4 AAA Unlock Bypass 3 AAA Unlock Bypass 2 ...

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Table 7. Program, erase times and endurance cycles, 800F Parameter Chip erase Block erase (64 Kbytes) Erase suspend latency time Program (byte or word) Chip program (byte by byte) Chip program (word by word) Program/erase cycles (per block) Data retention ...

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... DQ7, not its complement. During erase operations the data polling bit outputs ’0’, the complement of the erased state of DQ7. After successful completion of the erase operation the memory returns to read mode. In erase suspend mode the data polling bit will output a ’1’ during a bus read operation within a block being erased. The data polling bit will change from a ’ ...

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... Note that the Program command cannot change a bit set to ’0’ back to ’1’ and attempting will set DQ5 to ‘1’. A bus read operation to that address will show the bit is still ‘0’. One of the erase commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’ ...

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Table 8. Status register bits Operation Address Program Any address Program during Any address erase suspend Program error Any address Chip erase Any address Erasing block Block erase before timeout Non-erasing block Erasing block Block erase Non-erasing block Erasing block ...

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Figure 11. Toggle flowchart 30/56 START READ DQ6 READ DQ5 & DQ6 DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 TWICE DQ6 NO = TOGGLE YES FAIL PASS AI01370C ...

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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Refer also to the Numonyx SURE program and other relevant quality documents. ...

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DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement ...

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Figure 13. AC measurement load circuit V CC 0.1µ includes JIG capacitance Table 11. Device capacitance Symbol Parameter C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 12. DC characteristics Symbol Parameter ...

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Figure 14. Read mode AC waveforms A0-A18/ A– DQ0-DQ7/ DQ8-DQ15 BYTE tELBL/tELBH Table 13. Read AC characteristics Symbol Alt Parameter t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ...

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Figure 15. Write AC waveforms, write enable controlled A0-A18/ A–1 E tELWL G tGHWL W DQ0-DQ7/ DQ8-DQ15 V CC tVCHEL RB Table 14. Write AC characteristics, write enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...

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Figure 16. Write AC waveforms, chip enable controlled A0-A18/ A–1 W tWLEL G tGHEL E DQ0-DQ7/ DQ8-DQ15 V CC tVCHWL RB Table 15. Write AC characteristics, chip enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...

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Figure 17. Reset/block temporary unprotect AC waveforms tPLPX RP Table 16. Reset/block temporary unprotect AC characteristics Symbol Alt (2) t PHWL RP High to Write Enable Low, Chip Enable t t PHEL RH Low, Output Enable ...

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... Package mechanical data In order to meet environmental requirements, Numonyx offers these devices in ECOPACK® packages. ECOPACK® packages are lead-free. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. Figure 18. TSOP48 – ...

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Figure 19. TFBGA48 6x8mm – ball array - 0.80 mm pitch, bottom view package outline FD FE BALL "A1" Drawing is not to scale. Table 18. TFBGA48 6 x 8mm – 6 ...

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... Example: Device type M29 Parallel Flash Memory Operating voltage 3.6 V main family Device function 800F = 8 Mbit memory array, (× 8, × 16) 400F = 4 Mbit memory array (× 8, × 16) Array matrix T = Top boot B = Bottom boot Speed Class ( device denotes Auto Grade – °C parts device speed in conjunction with temperature range = 3 denotes Auto Grade – ...

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... For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest Numonyx Sales Office. 41/56 ...

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Appendix A Block address table Table 20. Top boot block addresses, M29W800FT # Size (Kbytes ...

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Table 21. Bottom boot block addresses, M29W800FB # Size (Kbytes) Address range (× ...

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Table 22. Top boot block addresses M29W400FT # Size (Kbytes Table 23. Bottom boot block addresses M29W400FB # ...

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... The CFI data structure also contains a security area where a 64-bit unique security number is written (see Table 29: Security code by the final user impossible to change the security number after it has been written by Numonyx. Issue a Read command to return to read mode. Table 24. Query structure overview Address ...

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Table 25. CFI query identification string Address 10h 20h 0051h 11h 22h 0052h 12h 24h 0059h 13h 26h 0002h 14h 28h 0000h 15h 2Ah 0040h 16h 2Ch 0000h 17h 2Eh 0000h 18h 30h 0000h 19h 32h ...

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Table 27. Device geometry definition Address Data × 16 × 8 27h 4Eh 0014h Device size = 2 28h 50h 0002h Flash device interface code description 29h 52h 0000h 2Ah 54h 0000h Maximum number of bytes in multi-byte program or ...

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Table 28. Primary algorithm-specific extended query table Address × 16 × 8 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h Table 29. ...

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... Unlike the command interface of the program/erase controller, the techniques for protecting and unprotecting blocks change between different Flash memory suppliers. For example, the techniques for AMD parts will not work on Numonyx parts. Care should be taken when changing drivers for one part to work on another. ...

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Table 30. Programmer technique bus operations, BYTE = V Operation E G Block protect Chip unprotect Block protection verify Block unprotection verify 50/56 Address ...

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Figure 20. Programmer equipment block protect flowchart ADDRESS = BLOCK ADDRESS START Wait 4µ Wait 100µ ...

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Figure 21. Programmer equipment chip unprotect flowchart NO 52/56 START PROTECT ALL BLOCKS CURRENT BLOCK = 0 A6, A12, A15 = Wait 4µ Wait ...

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Figure 22. In-system equipment block protect flowchart ADDRESS = BLOCK ADDRESS ADDRESS = BLOCK ADDRESS ...

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Figure 23. In-system equipment chip unprotect flowchart ISSUE READ/RESET 54/56 START PROTECT ALL BLOCKS CURRENT BLOCK = WRITE 60h ANY ADDRESS WITH ...

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... Initial release. 2 Added TFBGA package. Minor text changes. 3 Applied Numonyx branding. 4 Added support for 400FT/B Changes cover page as following: – Revised memory block information to include 19 memory blocks for M29W800F and 11 memory blocks for M29W400F. 5 – Removed references device for KGD. ...

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... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...