M29W640GL70NA6E NUMONYX, M29W640GL70NA6E Datasheet - Page 20

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M29W640GL70NA6E

Manufacturer Part Number
M29W640GL70NA6E
Description
IC FLASH 64MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of M29W640GL70NA6E

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Package
48TSOP
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3|3.3 V
Sector Size
64KByte x 128
Timing Type
Asynchronous
Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M29W640GL70NA6E
Manufacturer:
MICRON
Quantity:
2 000
Part Number:
M29W640GL70NA6E
Manufacturer:
ST
0
3.5
3.6
3.6.1
3.6.2
20/90
Automatic standby
If CMOS levels (V
more the memory enters automatic standby where the internal supply current is reduced to
the standby supply current, I
operation is in progress.
Special bus operations
Additional bus operations can be performed to read the electronic signature and also to
apply and remove block protection. These bus operations are intended for use by
programming equipment and are not usually used in applications. They require V
applied to some pins.
Electronic signature
The memory has two codes, the manufacturer code and the device code, that can be read
to identify the memory. These codes can be read by applying the signals listed in
Bus operations, BYTE = VIL
Block protect and chip unprotect
Groups of blocks can be protected against accidental program or erase. The protection
groups are shown in
can be unprotected to allow the data inside the blocks to be changed.
The V
Hardware
Block protect and chip unprotect operations are described in
PP
/Write Protect pin can be used to protect the blocks as described in
protection.
CC
Appendix A: Block
± 0.2 V) are used to drive the bus and the bus is inactive for 300 ns or
CC2
and
. The Data Inputs/Outputs will still output data if a bus read
Table 8: Bus operations, BYTE =
addresses,
Table 29
and
Appendix D: Block
Table
VIH, with A9 set to V
30. The whole chip
Table 6:
protection.
ID
Table 7:
to be
ID
.

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