M28W640FCB70N6F NUMONYX, M28W640FCB70N6F Datasheet
M28W640FCB70N6F
Specifications of M28W640FCB70N6F
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M28W640FCB70N6F Summary of contents
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... Manufacturer code: 20h – Top device code, M28W640FCT: 8848h – Bottom device code, M28W640FCB: 8849h March 2008 M28W640FCT M28W640FCB 64 Mbit (4Mbx16, Boot Block) 3V Supply Flash memory FBGA TFBGA48 (ZB) 6.39 x 10.5mm TSOP48 ( 20mm ■ Packages – ECOPACK® compliant Rev 4 1/77 www.numonyx.com 1 ...
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... Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 Automatic Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Read electronic signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.6 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 Double Word Program command ...
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M28W640FCT, M28W640FCB 4.9 Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.10 ...
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Contents Appendix C Flowcharts and pseudo codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Appendix D Command ...
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M28W640FCT, M28W640FCB List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 2. TSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 3. TFBGA connections (top view through package Figure 4. Block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Protection Register memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 7. AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 8. Read AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 9. Write AC waveforms, Write enable controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 10. ...
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... The device includes a 192 bit Protection Register to increase the protection of a system design. The Protection Register is divided into a 64 bit segment and a 128 bit segment. The 64 bit segment contains a unique device number written by Numonyx, while the second one is one-time-programmable by the user. The user programmable segment can be permanently protected ...
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Summary description Figure 1. Logic diagram Table 1. Signal names A0-A21 DQ0-DQ15 DDQ 8/ DDQ A0-A21 W E M28W640FCT M28W640FCB G ...
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M28W640FCT, M28W640FCB Figure 2. TSOP connections A15 1 48 A14 A13 A12 A11 A10 A9 A8 A21 A20 M28W640FCT M28W640FCB A19 A18 A17 ...
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Summary description Figure 3. TFBGA connections (top view through package A13 B A14 C A15 D A16 E V DDQ 10/ A11 A10 W RP A18 A12 ...
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... KWords 3F8000 3F7FFF 32 KWords 3F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 1. Also see Appendix Figure 5. Protection Register memory map 8Ch 85h 84h 81h 80h Total KWord Blocks Total of 127 32 KWord Blocks A, Tables 24 and 25 for a full listing of the Block Addresses. PROTECTION REGISTER ...
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... Figure 1: Logic diagram connected to this device. 2.1 Address inputs (A0-A21) The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command Interface of the internal state machine. 2.2 ...
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... Chip Enable or a change of the address is required to ensure valid data outputs. 2.8 V supply voltage DD V provides the power supply to the internal core of the memory device the main DD power supply for all operations (Read, Program and Erase). 2.9 V supply voltage DDQ ...
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... Read Read Bus operations are used to output the contents of the Memory Array, the Electronic Signature, the Status Register and the Common Flash Interface. Both Chip Enable and Output Enable must should be used to enable the device. Output Enable should be used to gate data onto the output ...
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... Reset During Reset mode when Output Enable is Low, V outputs are high impedance. The memory is in Reset mode when Reset consumption is reduced to the Standby level, independently from the Chip Enable, Output Enable or Write Enable inputs. If Reset is pulled to V operation is aborted and the memory content is no longer valid. ...
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... Read Memory Array command The Read command returns the memory to its Read mode. One Bus Write cycle is required to issue the Read Memory Array command and return the memory to Read mode. Subsequent read operations will read the addressed location and output the data. When a device Reset occurs, the memory defaults to Read mode ...
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... Read CFI Query command The Read Query Command is used to read data from the Common Flash Interface (CFI) Memory Area, allowing programming equipment or applications to automatically match their interface to the characteristics of the device. One Bus Write cycle is required to issue the Read Query Command. Once the command is issued subsequent Bus Read operations read from the Common Flash Interface Memory Area ...
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... During Program operations the memory will accept the Read Status Register command and the Program/Erase Suspend command. Typical Program times are given in Program, Erase Times and Program/Erase endurance Programming aborts if Reset goes to V program operation is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix C, the Program command ...
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... The fifth bus cycle latches the Address and the Data of the fourth word to be written and starts the Program/Erase Controller. Read operations output the Status Register content after the programming has started. Programming aborts if Reset goes to V program operation is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix C, flowchart for using the Quadruple Word Program command ...
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... Read operations output the Status Register content after the programming has started. The segment can be protected by programming bit 1 of the Protection Lock Register (see Figure 5: Protection Register memory Protection Register will result in a Status Register error. The protection of the Protection Register is not reversible. ...
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M28W640FCT, M28W640FCB 4.13 Block Lock command The Block Lock command is used to lock a block and prevent Program or Erase operations from changing the data in it. All blocks are locked at power-up or reset. Two Bus Write cycles ...
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Command interface 4.14 Block Unlock command The Block Unlock command is used to unlock a block, allowing the block to be programmed or erased. Two Bus Write cycles are required to issue the Block Unlock command. ● The first bus ...
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... M28W640FCT, M28W640FCB (1) Table 4. Commands Commands 1st Cycle Op. Add Data Read Memory 1+ Write X Array Read Status 1+ Write X Register Read Electronic 1+ Write X Signature Read CFI 1+ Write X Query Erase 2 Write X Program 2 Write X Double Word 3 Write X (3) Program Quadruple Word 5 Write X (4) Program Clear Status ...
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Command interface Table 5. Read Electronic signature Code Device Manufacture Code M28W640 FCT Device Code M28W640 FCB Table 6. Read Block Lock signature Block Status E Locked Block V IL Unlocked V IL Block ...
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M28W640FCT, M28W640FCB Table 7. Read Protection Register and Lock Register Word E G Lock Unique Unique Unique Unique ...
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Command interface Table 8. Program, Erase Times and Program/Erase endurance cycles Parameter Word Program Double Word Program Quadruple Word Program Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) 1. Typical time to ...
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M28W640FCT, M28W640FCB 5 Block locking The M28W640FCT and M28W640FCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. ● Lock/Unlock - this ...
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Block locking 5.4 Lock-Down state Blocks that are Locked-Down (state (0,1,x))are protected from program and erase operations (as for Locked blocks) but their protection status cannot be changed using software commands alone. A Locked or Unlocked block can be Locked-Down ...
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M28W640FCT, M28W640FCB Table 10. Protection status Current Protection Status (WP, DQ1, DQ0) Program/Erase Current State 1,0,0 (2) 1,0,1 1,1,0 1,1,1 0,0,0 (2) 0,0,1 0,1,1 1. The lock status is defined by the write protect pin and by DQ1 (‘1’ for ...
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... The Erase Suspend Status bit indicates that an Erase operation has been suspended or is going to be suspended. When the Erase Suspend Status bit is High (set to ‘1’), a Program/Erase Suspend command has been issued and the memory is waiting for a Program/Erase Resume command. The Erase Suspend Status should only be considered valid when the Program/Erase Controller Status bit is High (Program/Erase Controller inactive). Bit 7 is set within 30µ ...
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... Erase status (bit 5) The Erase Status bit can be used to identify if the memory has failed to verify that the block has erased correctly. When the Erase Status bit is High (set to ‘1’), the Program/Erase Controller has applied the maximum number of pulses to the block and still failed to verify that the block has erased correctly ...
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Status Register 6.7 Block Protection status (bit 1) The Block Protection Status bit can be used to identify if a Program or Erase operation has tried to modify the contents of a locked block. When the Block Protection Status bit ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the Numonyx SURE Program and other relevant quality documents. Table 12. ...
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DC and AC parameters 8 DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from ...
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M28W640FCT, M28W640FCB Figure 7. AC measurement load circuit Table 14. Capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. V DDQ V DD DEVICE UNDER TEST 0.1µF 0.1µ includes JIG capacitance ...
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DC and AC parameters Table 15. DC characteristics Symbol I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) DD Supply Current (Stand- DD1 Automatic Stand-by) I Supply Current (Reset) DD2 I Supply Current ...
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M28W640FCT, M28W640FCB Table 15. DC characteristics (continued) Symbol Program voltage (Program or V PP1 Erase operations) Program voltage (Program or V PPH Erase operations) Program voltage (Program V PPLK and Erase lock-out) V supply voltage (Program DD V LKO and ...
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DC and AC parameters Figure 8. Read AC waveforms A0-A21 E G DQ0- DQ15 Table 16. Read AC characteristics Symbol Alt Address Valid to Next Address t t AVAV RC Valid t t Address Valid to Output Valid AVQV ACC ...
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M28W640FCT, M28W640FCB Figure 9. Write AC waveforms, Write enable controlled DC and AC parameters 39/77 ...
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DC and AC parameters Table 17. Write AC characteristics, Write enable controlled Symbol Alt t t AVAV AVWH DVWH ELWL CS t ELQV (1) t QVVPL (2) t QVWPL (1) t ...
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M28W640FCT, M28W640FCB Figure 10. Write AC waveforms, Chip enable controlled DC and AC parameters 41/77 ...
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DC and AC parameters Table 18. Write AC characteristics, Chip enable controlled Symbol Alt t t AVAV AVEH DVEH EHAX EHDX EHEL CPH t EHGL ...
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M28W640FCT, M28W640FCB Figure 11. Power-Up and Reset AC waveforms VDD, VDDQ Table 19. Power-Up and Reset AC characteristics Symbol t Reset High to Write Enable Low, PHWL t Chip Enable Low, Output Enable PHEL t Low ...
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Package mechanical 9 Package mechanical Figure 12. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, package outline DIE 1. Drawing is not to scale. Table 20. TSOP48 - 48 lead Plastic Thin Small Outline, ...
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M28W640FCT, M28W640FCB Figure 13. TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, bottom view package outline E BALL "A1" 1. Drawing is not to scale. Table 21. TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, package mechanical data Symbol A ...
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Package mechanical Figure 14. TFBGA48 daisy chain - package connections (top view through package 46/ M28W640FCT, M28W640FCB AI04390 ...
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M28W640FCT, M28W640FCB Figure 15. TFBGA48 daisy chain - PCB connections proposal (top view through package Package mechanical START POINT END POINT AI04391 47/77 ...
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Part numbering 10 Part numbering Table 22. Ordering information scheme Example: Device type M28 Operating voltage 2.7V to 3.6V Device function 640FC = 64 Mbit (4 Mb x16), Boot Block Array matrix T = ...
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... F = ECOPACK® Package, Tape & Reel Packing, 24mm 1. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you. Part numbering M28W640FC ...
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Block address tables Appendix A Block address tables Table 24. Top Boot Block Addresses, M28W640FCT # ...
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M28W640FCT, M28W640FCB Table 24. Top Boot Block Addresses, M28W640FCT (continued ...
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Block address tables Table 24. Top Boot Block Addresses, M28W640FCT (continued ...
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M28W640FCT, M28W640FCB Table 24. Top Boot Block Addresses, M28W640FCT (continued) # 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 ...
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Block address tables Table 25. Bottom Boot Block Addresses, M28W640FCB # 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 ...
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M28W640FCT, M28W640FCB Table 25. Bottom Boot Block Addresses, M28W640FCB (continued ...
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Block address tables Table 25. Bottom Boot Block Addresses, M28W640FCB (continued ...
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M28W640FCT, M28W640FCB Table 25. Bottom Boot Block Addresses, M28W640FCB (continued ...
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... The CFI data structure also contains a security area where a 64 bit unique security number is written (see Table 31: Security code by the final user impossible to change the security number after it has been written by Numonyx. Issue a Read command to return to Read mode. Table 26. Query Structure Overview Offset ...
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... Alternate Vendor Command Set and Control Interface ID code second vendor - specified algorithm supported (0000h means none exists) Address for Alternate Algorithm extended Query table (0000h means none exists) Common Flash Interface (CFI) Value Numonyx Top Bottom "Q" "R" "Y" Intel compatibl ...
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Common Flash Interface (CFI) Table 28. CFI Query System Interface Information Offset Data 1Bh 0027h 1Ch 0036h 1Dh 00B4h 1Eh 00C6h 1Fh 0004h 20h 0004h 21h 000Ah 22h 0000h 23h 0005h 24h 0005h 25h 0003h 26h 0000h 60/77 Description V ...
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M28W640FCT, M28W640FCB Table 29. Device Geometry Definition Offset Word Data Mode 27h 0017h 28h 0001h 29h 0000h 2Ah 0003h 2Bh 0000h 2Ch 0002h 2Dh 007Eh 2Eh 0000h 2Fh 0000h 30h 0001h 31h 0007h 32h 0000h 33h 0020h 34h 0000h 2Dh ...
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Common Flash Interface (CFI) Table 30. Primary Algorithm-specific Extended Query table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h (P+2)h = 37h 0049h (P+3)h = 38h 0031h (P+4)h = 39h 0030h (P+5)h = 3Ah ...
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M28W640FCT, M28W640FCB Table 30. Primary Algorithm-specific Extended Query table (continued) Offset Data ( 35h (P+F)h = 44h 0080h (P+10)h = 0000h 45h (P+11)h = 0003h 46h (P+12)h = 0004h 47h (P+13)h = 48h 1. See Table 27, offset ...
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... If an error is found, the Status Register must be cleared before further Program/Erase Controller operations. 64/77 program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0x40) ; /*or writeToFlash (any_address, 0x10 writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...
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... If an error is found, the Status Register must be cleared before further Program/Erase operations. 3. Address 1 and Address 2 must be consecutive addresses differing only for bit A0. double_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x30) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...
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... Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ...
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M28W640FCT, M28W640FCB Figure 19. Program Suspend & Resume flowchart and pseudo code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues program_suspend_command ...
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... End error is found, the Status Register must be cleared before further Program/Erase operations. 68/77 erase_command ( blockToErase ) { writeToFlash (any_address, 0x20) ; writeToFlash (blockToErase, 0xD0 only A12-A20 are significannt */ /* Memory enters read status state after the Erase Command */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...
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M28W640FCT, M28W640FCB Figure 21. Erase Suspend & Resume flowchart and pseudo code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program/Protection Program or Block ...
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Flowcharts and pseudo codes Figure 22. Locking Operations flowchart and pseudo code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States Locking change confirmed? YES Write FFh End 70/77 locking_operation_command (address, lock_operation) { writeToFlash (any_address, ...
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... Status check of b1 (Protected Block after a sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. protection_register_program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0xC0) ; writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...
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Command Interface and Program/Erase Controller State Appendix D Command Interface and Program/Erase Controller State . Table 32. Write State machine Current/Next SR Current Data When Read bit State Read Array 7 (FFh) Read Read Array “1” Array Array Read Read ...
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M28W640FCT, M28W640FCB Table 32. Write State machine Current/Next SR Current Data When Read bit State Read Array 7 (FFh) Prog. Prog. Sus “1” CFI Read CFI Read Array Program Read “1” Status (complete) Array Erase “1” Status Setup Erase Read ...
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Command Interface and Program/Erase Controller State . Table 33. Write State machine Current/Next Current Read State Elect.Sg. (90h) Read Read Array Elect.Sg. Read Read Status Elect.Sg. Read Read Elect.Sg. Elect.Sg. Read CFI Read Query Elect.Sg. Lock Setup Lock Cmd Read ...
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M28W640FCT, M28W640FCB Table 33. Write State machine Current/Next Current Read State Elect.Sg. (90h) Program Read (complete) Elect.Sg. Erase Setup Erase Read Cmd.Error Elect.Sg. Erase (continue) Erase Erase Suspend Suspend Read Read Elect.Sg. Ststus Erase Erase Suspend Suspend Read Read Array ...
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... Blank and T options removed from below Table 23. Packages are ECOPACK® compliant. The 0.13µm technology was removed from the device options of 3 Table 22: Ordering information 4 Applied Numonyx branding. M28W640FCT, M28W640FCB Revision details and Figure 3: TFBGA connections (top Table 20: TSOP48 - 48 characteristics. Option ...
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... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...