CY62157EV30LL-45ZXI Cypress Semiconductor Corp, CY62157EV30LL-45ZXI Datasheet - Page 9

• Manufacturer Part Number: CY62157EV30LL-45ZXI
• Description: IC SRAM 8MBIT 45NS 48TSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY62157EV30LL-45ZXI

• Memory Size: 8M (512K x 16)
• Package / Case: 48-TSOP I
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 45 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.2 V
• Maximum Operating Current: 25 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 2.5 V, 3.3 V
• Density: 8Mb
• Access Time (max): 45ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 2.5/3.3V
• Address Bus: 19b
• Package Type: TSOP-I
• Operating Temp Range: -40C to 85C
• Supply Current: 25mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Word Size: 16b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2080-5; CY62157EV30LL-45ZXI

Switching Waveforms
Notes
Document #: 38-05445 Rev. *I
Write Cycle No. 1 (WE Controlled)
25. The internal write time of the memory is defined by the overlap of WE, CE = V
26. Data I/O is high impedance if OE = V
27. If CE
28. During this period, the I/Os are in output state. Do not apply input signals.
a write and any of these signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that
terminates the write.
ADDRESS
BHE/BLE
DATA I/O
1
goes HIGH and CE
CE
CE
WE
OE
1
2
NOTE 28
2
goes LOW simultaneously with WE = V
(continued)
IH
t
.
SA
t
HZOE
[25, 26, 27]
t
AW
IH
, the output remains in a high impedance state.
t
SCE
t
WC
IL
, BHE, BLE or both = V
t
BW
VALID DATA
t
t
PWE
SD
IL
, and CE
2
t
HD
= V
t
CY62157EV30 MoBL
HA
IH
. All signals must be active to initiate
Page 9 of 21
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