PC48F4400P0TB0EE NUMONYX, PC48F4400P0TB0EE Datasheet - Page 29

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PC48F4400P0TB0EE

Manufacturer Part Number
PC48F4400P0TB0EE
Description
IC FLASH 256MBIT 64EZBGA
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of PC48F4400P0TB0EE

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512M (32Mx16)
Speed
95ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-EZBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
P33-65nm
9.3
9.4
9.5
Datasheet
29
The status register can be examined for Blank Check progress and errors by reading
any address within the block being accessed. During a blank check operation, the
Status Register indicates a busy status (SR.7 = 0). Upon completion, the Status
Register indicates a ready status (SR.7 = 1). The Status Register should be checked for
any errors, and then cleared. If the Blank Check operation fails, which means the block
is not completely erased, the Status
Erase Suspend
Issuing the Erase Suspend command while erasing suspends the block erase operation.
This allows data to be accessed from memory locations other than the one being
erased. The Erase Suspend command can be issued to any device address. A block
erase operation can be suspended to perform a word or buffer program operation, or a
read operation within any block except the block that is erase suspended (see
Figure 37, “Erase Suspend/Resume Flowchart” on page
When a block erase operation is executing, issuing the Erase Suspend command
requests the WSM to suspend the erase algorithm at predetermined points. The device
continues to output Status Register data after the Erase Suspend command is issued.
Block erase is suspended when Status Register bits SR[7,6] are set. Suspend latency is
specified in
To read data from the device (other than an erase-suspended block), the Read Array
command must be issued. During Erase Suspend, a Program command can be issued
to any block other than the erase-suspended block. Block erase cannot resume until
program operations initiated during erase suspend complete. Read Array, Read Status
Register, Read Device Identifier, Read CFI, and Erase Resume are valid commands
during Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend,
Block Lock, Block Unlock, and Block Lock-Down are valid commands during Erase
Suspend.
During an erase suspend, deasserting CE# places the device in standby, reducing
active current. VPP must remain at a valid level, and WP# must remain unchanged
while in erase suspend. If RST# is asserted, the device is reset.
Erase Resume
The Erase Resume command instructs the device to continue erasing, and
automatically clears SR[7,6]. This command can be written to any address. If status
register error bits are set, the Status Register should be cleared before issuing the next
instruction. RST# must remain deasserted.
Erase Protection
When VPP = V
VPP is at or below V
error.
Section 15.5, “Program and Erase Characteristics” on page
IL
, absolute hardware erase protection is provided for all device blocks. If
PPLK
, erase operations halt and SR.3 is set indicating a VPP-level
78).
Order Number:320003-09
58.
Mar 2010

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