CY62167EV30LL-45ZXI Cypress Semiconductor Corp, CY62167EV30LL-45ZXI Datasheet - Page 15

• Manufacturer Part Number: CY62167EV30LL-45ZXI
• Description: IC SRAM 16MBIT 45NS 48TSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY62167EV30LL-45ZXI

• Memory Size: 16M (2M x 8 or 1M x 16)
• Package / Case: 48-TSOP I
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 45 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.2 V
• Maximum Operating Current: 30 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document History Page
Document #: 38-05446 Rev. *I
Document Title: CY62167EV30 MoBL
Document Number: 38-05446
Rev.
*A
*B
*C
*D
*E
*G
*H
*F
**
*I
ECN No.
1130323
1323984
2678799
2720234
2880574
2934396
3006301
202600
463674
469169
VKN/PYRS
VKN/AESA
VKN/AESA
Change
Orig. of
RAME
NXR
VKN
VKN
VKN
AJU
NSI
Submission
01/23/2004
03/25/2009
06/17/2009
02/18/2010
08/12/2010
See ECN
See ECN
See ECN
See ECN
06/03/10
®
Date
16-Mbit (1M x 16 / 2M x 8) Static RAM
New Data Sheet
Minor Change: Moved to external web
Included -45BVXA part in the Ordering information table
Modified I
Converted from Advance Information to Preliminary
Removed ‘L’ bin and 35 ns speed bin from product offering
Modified Data sheet to include x8 configurability.
Changed ball E3 in FBGA pinout from DNU to NC
Changed the I
Changed the I
Changed Vcc stabilization time in footnote #9 from 100 µs to 200 µs
Changed the AC Test Load Capacitance value from 50 pF to 30 pF
Corrected typo in Data Retention Characteristics (t
Changed t
Changed t
Changed t
Changed t
Changed t
Changed t
Updated 48 ball FBGA Package Information.
Updated the Ordering Information table
Converted from preliminary to final
Changed I
Changed I
Changed I
Added V
Added footnote# 10 related to I
Changed I
Changed I
Added footnote# 15 related to AC timing parameters
Modified I
Added 48-Ball VFBGA (6 x 7 x 1mm) package
Added footnote# 1 related to VFBGA (6 x 7 x 1mm) package
Updated Ordering Information table
Added Automotive-A information
Added Contents.
Updated all package diagrams.
Updated links in
Added footnote #25 related to chip enable.
Updated template.
Included BHE and BLE in I
power down feature.
Removed 48-Ball VFBGA (6 x 7 x 1 mm) package related information.
Added Acronyms and Ordering code definition.
Format updates to match template.
Description of Change
IL
CCDR
CCDR
OHA
LZOE
HZOE
SCE
PE
SD
CC
CC
CC
SB1
CCDR
spec for TSOP I package and footnote# 9
from 30 ns to 35 ns
from 20 ns to 25 ns
max spec from 2.8 mA to 4.0 mA for f=1MHz
typ spec from 22 mA to 25 mA for f=f
max spec from 25 mA to 30 mA for f=f
, t
SB2(Typ)
CC(Max)
, t
and I
, t
from 3 ns to 5 ns.
AW
spec for TSOP I package
spec from 8 μA to 10 μA for Auto-A grade.
LZCE
spec from 8 μA to 10 μA
HZCE
Sales, Solutions, and Legal Information.
, and t
SB2
, t
, t
LZBE
value from 40 mA to 25 mA
value from 1.3 μA to 1.5 μA
HZBE
spec from 8.5 μA to 12 μA
BW
, and t
SB1
from 40 ns to 35 ns
, and t
, I
SB2
LZWE
SB2
HZWE
and I
, and I
from 6 ns to 10 ns
from 15 ns to 18 ns
CCDR
CY62167EV30 MoBL
CCDR
test conditions to reflect Byte
R
max
) from 100 µs to t
max
Page 15 of 16
RC
ns
®
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