AT49F4096A-12RC Atmel, AT49F4096A-12RC Datasheet

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AT49F4096A-12RC

Manufacturer Part Number
AT49F4096A-12RC
Description
IC FLASH 4MBIT 120NS 44SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT49F4096A-12RC

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8 or 256K x 16)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT49F4096A12RC
Features
Description
The AT49F4096A is a 5-volt, 4-megabit Flash memory organized as 524,288 words of
8 bits each or 256K words of 16 bits each. Manufactured with Atmel’s advanced non-
volatile CMOS technology, the device offers access times to 70 ns with power
dissipation of just 275 mW. When deselected, the CMOS standby current is less than
100 µA.
The device contains a user-enabled “boot block” protection feature. The AT49F4096A
locates the boot block at lowest order addresses (“bottom boot”).
To allow for simple in-system reprogrammability, the AT49F4096A does not require
high-input voltages for programming. Reading data out of the device is similar to read-
ing from an EPROM; it has standard CE, OE and WE inputs to avoid bus contention.
Reprogramming the AT49F4096A is performed by first erasing a block of data and
then programming on a byte-by-byte or word-by-word basis.
Pin Configurations
Pin Name
A0 - A17
CE
OE
WE
RESET
I/O0 - I/O15
I/O15(A-1)
BYTE
NC
Single-voltage Operation
Fast Read Access Time – 70 ns
Internal Erase/Program Control
Sector Architecture
Fast Sector Erase Time – 10 Seconds
Byte-by-byte or Word-by-word Programming – 10 µs Typical
Hardware Data Protection
Data Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
– 5V Read
– 5V Programming
– One 8K Word (16K Bytes) Boot Block with Programming Lockout
– Two 4K Word (8K Bytes) Parameter Blocks
– One 240K Word (480K Bytes) Main Memory Array Block
– 50 mA Active Current
– 100 µA CMOS Standby Current
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
4-megabit
(512K x 8/
256K x 16)
Flash Memory
AT49F4096A
Not Recommended
for New Design
Contact Atmel to discuss
the latest design in trends
and options
Rev. 1604F–FLASH–4/04
1

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AT49F4096A-12RC Summary of contents

Page 1

... To allow for simple in-system reprogrammability, the AT49F4096A does not require high-input voltages for programming. Reading data out of the device is similar to read- ing from an EPROM; it has standard CE, OE and WE inputs to avoid bus contention. Reprogramming the AT49F4096A is performed by first erasing a block of data and then programming on a byte-by-byte or word-by-word basis. Pin Configurations ...

Page 2

... The boot sector is designed to contain user secure code. For the AT49F4096A, the BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at a logic “1” or left open, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic “ ...

Page 3

... ADDRESS INPUTS X DECODER READ: The AT49F4096A is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-impedance state whenever high. This dual line control gives designers flexibility in preventing bus contention ...

Page 4

... AT49F4096A 4 If the boot block lockout has been enabled, the chip erase will not erase the data in the boot block; it will erase the main memory block and the parameter blocks only. After the chip erase, the device will return to the read or standby mode. ...

Page 5

... Entry/Exit” on page 13. The manufacturer and device codes are the same for both modes. DATA POLLING: The AT49F4096A features Data Polling to indicate the end of a pro- gram cycle. During a program cycle, an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been com- pleted, true data is valid on all outputs and the next cycle may begin. During a chip or sector erase operation, an attempt to read the device will give a “ ...

Page 6

... Temperature under Bias ................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ...................................-0.6V to +6.25V All Output Voltages with Respect to Ground .............................-0. Voltage on RESET with Respect to Ground ...................................-0.6V to +13.5V AT49F4096A 6 (1) 1st Bus 2nd Bus 3rd Bus Cycle Cycle Cycle ...

Page 7

... Condition MHz OUT -400 µA OH AT49F4096A AT49F4096A-90 N/A -40°C - 85°C 5V ± 10 OUT High-Z High-Z X High-Z ( A17 = Manufacturer Code ( A17 = Device Code A17 = V Manufacturer Code A17 = V Device Code IH IL Min Max 10.0 10.0 100.0 3.0 50.0 0.8 2.0 0.45 2 ...

Page 8

... AT49F4096A-70 Min ADDRESS ADDRESS VALID ACC t RO RESET HIGH Z OUTPUT OUTPUT - t after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT49F4096A-90 Max Min Max 800 800 VALID . ACC after an address change CE ACC OE Units ns ns ...

Page 9

... Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: This parameter is characterized and is not 100% tested. 1604F–FLASH–4/04 3.0V 0. < 5.0V 5.0V 30 Max 6 12 AT49F4096A Units Conditions OUT 9 ...

Page 10

... Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH AC Byte/Word Load Waveforms WE Controlled CE Controlled AT49F4096A 10 Min Max Units 1604F–FLASH–4/04 ...

Page 11

... For chip erase, the data should be 10H, and for sector erase, the data should be 30H. 1604F–FLASH–4/04 PROGRAM CYCLE WPH 5555 5555 2AAA WPH 5555 2AAA 5555 5555 WORD 0 WORD 1 WORD 2 WORD 3 AT49F4096A Min Typ 5555 ADDRESS AA INPUT DATA Note 2 2AAA t EC Note 3 55 WORD 4 WORD 5 Max Units 50 µ ...

Page 12

... Read Characteristics” on page 8. OE (1)(2)(3) Toggle Bit Waveforms I/O6 Notes: 1. Toggling either both OE and CE will operate toggle bit. The t input(s). 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT49F4096A 12 (1) t OEH t HIGH (1) t ...

Page 13

... Boot Block Lockout Enable Algorithm (1)(6) LOAD DATA F0 TO ANY ADDRESS EXIT PRODUCT IDENTIFICATION (4) MODE Notes AT49F4096A LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 80 TO ADDRESS 5555 LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA ...

Page 14

... Wide, Plastic Gull Wing Small Outline (SOIC) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) AT49F4096A 14 Ordering Code AT49F4096A-70TI AT49F4096A-90RI AT49F4096A-90TI Package Type Package Operation Range 48T Industrial (-40° to 85°C) 44R Industrial 48T (-40° to 85°C) ...

Page 15

... PIN 1 1.27(0.050) BSC 28.32(1.115) 28.07(1.105) 0.33(0.130) 1.27(0.050) 0º ~ 8º 1.00(0.039) 0.60(0.024) TITLE 44R, 44-lead (0.525" Body) Plastic Gull Wing Small Outline (SOIC) AT49F4096A 13.46(0.530) 16.18(0.637) 13.21(0.520) 15.82(0.623) 2.67(0.105) 2.41(0.095) 0.250(0.010) 0.100(0.004) DRAWING NO. 04/11/01 REV. 44R A 15 ...

Page 16

... E Notes: 1. This package conforms to JEDEC reference MO-142, Variation DD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT49F4096A 16 PIN SEATING PLANE A1 TITLE ...

Page 17

... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...

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