AT45DB161D-TU Atmel, AT45DB161D-TU Datasheet - Page 2

IC FLASH 16MBIT 66MHZ 28TSOP

AT45DB161D-TU

Manufacturer Part Number
AT45DB161D-TU
Description
IC FLASH 16MBIT 66MHZ 28TSOP
Manufacturer
Atmel
Datasheets

Specifications of AT45DB161D-TU

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (4096 pages x 528 bytes)
Speed
66MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSOP
Memory Configuration
4096 Pages X 528 Bytes
Interface Type
Serial, SPI
Clock Frequency
66MHz
Supply Voltage Range
2.5V To 3.6V, 2.7V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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2.
Note:
2
Figure 2-1.
Figure 2-3.
RDY/BUSY
RESET
operation. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a
parallel interface, the Atmel
The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system
reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many
commercial and industrial applications where high-density, low-pin count, low-voltage and low-power are essential.
To allow for simple in-system reprogrammability, the Atmel AT45DB161D does not require high input voltages for
programming. The device operates from a single power supply, 2.5V to 3.6V or 2.7V to 3.6V, for both the program
and read operations. The AT45DB161D is enabled through the chip select pin (CS) and accessed via a three-wire
interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
Pin Configurations and Pinouts
1. The metal pad on the bottom of the MLF package is floating. This pad can be a “No Connect” or connected to GND
GND
VCC
SCK
Atmel AT45DB161D
WP
NC
NC
NC
NC
NC
SO
CS
SI
TSOP Top View: Type 1
MLF (VDFN) Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RESET
SCK
CS
SI
1
2
3
4
®
DataFlash
8
7
6
5
SO
GND
VCC
WP
®
uses a Atmel RapidS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
serial interface to sequentially access its data.
Figure 2-2.
Figure 2-4.
RESET
SCK
A
B
C
D
E
CS
SI
BGA Package Ball-out
(Top View)
SOIC Top View
NC
NC
NC
NC
1
1
2
3
4
SCK
NC
SO
NC
CS
2
RDY/BSY
GND
NC
NC
3
SI
RESET
VCC
WP
NC
NC
4
8
7
6
5
3500N–DFLASH–05/10
NC
NC
NC
NC
NC
5
SO
GND
VCC
WP

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