AT45DB161D-TU Atmel, AT45DB161D-TU Datasheet - Page 9
![IC FLASH 16MBIT 66MHZ 28TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
AT45DB161D-TU
Manufacturer Part Number
AT45DB161D-TU
Description
IC FLASH 16MBIT 66MHZ 28TSOP
Manufacturer
Atmel
Specifications of AT45DB161D-TU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
16M (4096 pages x 528 bytes)
Speed
66MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSOP
Memory Configuration
4096 Pages X 528 Bytes
Interface Type
Serial, SPI
Clock Frequency
66MHz
Supply Voltage Range
2.5V To 3.6V, 2.7V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB161D-TU
Manufacturer:
ATMEL
Quantity:
5 510
Company:
Part Number:
AT45DB161D-TU
Manufacturer:
ATMEL
Quantity:
14
Part Number:
AT45DB161D-TU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3500N–DFLASH–05/10
7.5
7.6
page address bits (A20 - A9) that specify the page in the main memory to be erased and nine don’t care bits. When
a low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased state is a logical 1).
The erase operation is internally self-timed and should take place in a maximum time of t
status register and the RDY/BUSY pin will indicate that the part is busy.
Block Erase
A block of eight pages can be erased at one time. This command is useful when large amounts of data has to be
written into the device. This will avoid using multiple Page Erase Commands. To perform a block erase for the
standard Atmel DataFlash page size (528-bytes), an opcode of 50H must be loaded into the device, followed by
three address bytes comprised of two don’t care bits, nine page address bits (PA11 -PA3) and 13 don’t care bits.
The nine page address bits are used to specify which block of eight pages is to be erased. To perform a block
erase for the binary page size (512-bytes), the opcode 50H must be loaded into the device, followed by three
address bytes consisting of three don’t care bits, nine page address bits (A20 - A12) and 12 don’t care bits. The
nine page address bits are used to specify which block of eight pages is to be erased. When a low-to-high
transition occurs on the CS pin, the part will erase the selected block of eight pages. The erase operation is
internally self-timed and should take place in a maximum time of t
RDY/BUSY pin will indicate that the part is busy.
Table 7-1.
Sector Erase
The Sector Erase command can be used to individually erase any sector in the main memory. There are 16
sectors and only one sector can be erased at one time. To perform sector 0a or sector 0b erase for the standard
DataFlash page size (528-bytes), an opcode of 7CH must be loaded into the device, followed by three address
bytes comprised of two don’t care bits, nine page address bits (PA11 - PA3) and 13 don’t care bits. To perform a
sector 1-15 erase, the opcode 7CH must be loaded into the device, followed by three address bytes comprised of
two don’t care bits, four page address bits (PA11 - PA8) and 18 don’t care bits. To perform sector 0a or sector 0b
erase for the binary page size (512-bytes), an opcode of 7CH must be loaded into the device, followed by three
address bytes comprised of three don’t care bit and nine page address bits (A20 - A12) and 12 don’t care bits. To
perform a sector 1-15 erase, the opcode 7CH must be loaded into the device, followed by three address bytes
comprised of 3 don’t care bit and four page address bits (A20 - A17) and 17 don’t care bits. The page address bits
are used to specify any valid address location within the sector which is to be erased. When a low-to-high transition
occurs on the CS pin, the part will erase the selected sector. The erase operation is internally self-timed and should
PA11/
A20
0
0
0
0
1
1
1
1
•
•
•
PA10/
A19
0
0
0
0
1
1
1
1
•
•
•
Block Erase Addressing
PA9/
A18
0
0
0
0
1
1
1
1
•
•
•
PA8/
A17
0
0
0
0
1
1
1
1
•
•
•
PA7/
A16
0
0
0
0
1
1
1
1
•
•
•
PA6/
A15
0
0
0
0
1
1
1
1
•
•
•
PA5/
A14
0
0
0
0
1
1
1
1
•
•
•
PA4/
A13
0
0
1
1
0
0
1
1
•
•
•
BE
. During this time, the status register and the
PA3/
A12
0
1
0
1
0
1
0
1
•
•
•
Atmel AT45DB161D
PA2/
A11
X
X
X
X
X
X
X
X
•
•
•
PA1/
A10
X
X
X
X
X
X
X
X
•
•
•
PE
. During this time, the
PA0/
A9
X
X
X
X
X
X
X
X
•
•
•
Block
508
509
510
511
0
1
2
3
•
•
•
9