AT24C64C-PU Atmel, AT24C64C-PU Datasheet - Page 10
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AT24C64C-PU
Manufacturer Part Number
AT24C64C-PU
Description
IC EEPROM 64KBIT 1MHZ 8DIP
Manufacturer
Atmel
Datasheet
1.AT24C32CN-SH-B.pdf
(28 pages)
Specifications of AT24C64C-PU
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT24C64C-PU
Manufacturer:
ATMEL
Quantity:
5 530
Company:
Part Number:
AT24C64C-PU
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
AT24C64C-PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
12. Read Operations
Figure 12-1. Device Address
Figure 12-2. Byte Write
10
AT24C32C/64C
Read operations are initiated the same way as write operations with the exception that the
read/write select bit in the device address word is set to one. There are three read operations:
current address read, random address read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the last
address accessed during the last read or write operation, incremented by one. This address
stays valid between operations as long as the chip power is maintained. The address “roll over”
during read is from the last byte of the last memory page, to the first byte of the first page. The
address “roll over” during write is from the last byte of the current page to the first byte of the
same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged
by the EEPROM, the current address data word is serially clocked out. The microcontroller does
not respond with an input zero but does generate a following stop condition (see
page 12).
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data
word address. Once the device address word and data word address are clocked in and
acknowledged by the EEPROM, the microcontroller must generate another start condition. The
microcontroller now initiates a current address read by sending a device address with the
read/write select bit high. The EEPROM acknowledges the device address and serially clocks
out the data word. The microcontroller does not respond with a zero but does generate a follow-
ing stop condition (see
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran-
dom address read. After the microcontroller receives a data word, it responds with an
acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment
the data word address and serially clock out sequential data words. When the memory address
limit is reached, the data word address will “roll over” and the sequential read will continue. The
sequential read operation is terminated when the microcontroller does not respond with a zero
but does generate a following stop condition (see
Figure 12-5
on page 12).
Figure 12-6
on page 12).
5298A–SEEPR–1/08
Figure 12-4
on