MT46H8M32LFB5-6:A TR Micron Technology Inc, MT46H8M32LFB5-6:A TR Datasheet - Page 58
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MT46H8M32LFB5-6:A TR
Manufacturer Part Number
MT46H8M32LFB5-6:A TR
Description
IC DDR SDRAM 256MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M32LFB5-6:A TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1280-2
MT46H8M32LFB5-6:A TR
MT46H8M32LFB5-6:A TR
Table 15:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
Address inputs are switching every two clock cycles; Data bus inputs are
stable
Precharge power-down standby current: All banks idle; CKE is
LOW; CS is HIGH,
switching; Data bus inputs are stable
Precharge power-down standby current with clock stopped: All
banks idle; CKE is LOW; CS is HIGH, CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Precharge non-power-down standby current: All banks idle; CKE =
HIGH; CS = HIGH;
switching; Data bus inputs are stable
Precharge non-power-down standby current with clock
stopped: All banks idle; CKE = HIGH; CS = HIGH; CK = LOW; CK# =
HIGH; Address and control inputs are switching; Data bus inputs are
stable
Active power-down standby current: One bank active; CKE = LOW;
CS = HIGH;
Data bus inputs are stable
Active power-down standby current with clock stopped: One
bank active; CKE = LOW; CS = HIGH; CK = LOW; CK# = HIGH; Address
and control inputs are switching; Data bus inputs are stable
Active non-power-down standby current: One bank active;
CKE = HIGH; CS = HIGH;
switching; Data bus inputs are stable
Active non-power-down standby current with clock stopped:
One bank active; CKE = HIGH; CS = HIGH; CK = LOW; CK# = HIGH;
Address and control inputs are switching; Data bus inputs are stable
Operating burst read: One bank active; BL = 4; CL = 3;
(MIN); Continuous read bursts; I
switching every two clock cycles; 50 percent data changing each burst
Operating burst write: One bank active; BL = 4;
Continuous write bursts; Address inputs are switching; 50 percent data
changing each burst
Auto refresh current: Burst refresh; CKE = HIGH;
Address and control inputs are switching; Data bus
inputs are stable
Deep power-down current: Address and control
inputs are stable; Data bus inputs are stable
CK =
t
CK (MIN); CKE = HIGH; CS = HIGH between valid commands;
t
CK =
I
Notes: 1–5, 9, 11 apply to all parameters in this table; notes appear on pages 63–65; V
DD
t
t
t
CK (MIN); Address and control inputs are switching;
Specifications and Conditions (x16)
CK =
CK =
t
t
t
CK (MIN); Address and control inputs are
CK (MIN); Address and control inputs are
CK =
t
CK (MIN); Address and control inputs are
OUT
= 0mA; Address inputs are
t
t
CK=
RFC =
t
(MIN)
t
RFC =
RFC =
t
CK (MIN);
t
CK =
t
RFC (MIN);
58
t
t
RFC
REFI
t
CK
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
Standard
Standard
Symbol
power
power
I
I
I
I
I
I
I
I
I
I
I
DD
I
DD
I
DD
DD
DD
DD
I
Low
Low
DD
DD
I
I
DD
DD
DD
DD
DD
DD
DD
DD
2NS
3NS
2PS
2PS
3PS
4W
2N
3N
4R
2P
2P
3P
5a
0
5
8
300
220
300
220
100
100
60
25
25
10
65
10
-6
5
5
3
3
Electrical Specifications
Max
©2005 Micron Technology, Inc. All rights reserved.
300
220
300
220
100
-75
55
20
20
10
95
60
10
5
5
3
3
DD
/V
Units
DD
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
Q = 1.70–1.95V
Notes
36, 38
16
16
16
16
16
20
36
36
36
36