M25P40-VMN6P NUMONYX, M25P40-VMN6P Datasheet - Page 19

• Manufacturer Part Number: M25P40-VMN6P
• Description: IC FLASH 4MBIT 50MHZ 8SOIC
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25P40-VMN6P

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 512K X 8
• Ic Interface Type: Serial, SPI
• Clock Frequency: 50MHz
• Supply Voltage Range: 2.3V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3598; 497-3598

6.1
6.2
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 9.
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Write Enable (WREN) instruction sequence
Write Disable (WRDI) instruction sequence
S
C
D
Q
S
C
D
Q
High Impedance
0
High Impedance
0
(Figure
(Figure
1
1
2
2
Instruction
Instruction
3
9) resets the Write Enable Latch (WEL) bit.
3
8) sets the Write Enable Latch (WEL) bit.
4
4
5
5
6
6
7
7
AI02281E
AI03750D
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