M29W400DB70N1 NUMONYX, M29W400DB70N1 Datasheet - Page 14
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M29W400DB70N1
Manufacturer Part Number
M29W400DB70N1
Description
IC FLASH 4MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet
1.M29W400DB55N1.pdf
(48 pages)
Specifications of M29W400DB70N1
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
4M (512K x 8 or 256K x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M29W400DB70N1
Manufacturer:
ST
Quantity:
1 000
Company:
Part Number:
M29W400DB70N1
Manufacturer:
ST
Quantity:
1 000
Signal descriptions
2.7
2.8
2.9
2.10
14/48
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s command interface.
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a hardware reset to the
memory or to temporarily unprotect all blocks that have been protected.
A hardware reset is achieved by holding Reset/Block Temporary Unprotect Low, V
least t
ready for Bus Read and Bus Write operations after t
See the Ready/Busy output section,
characteristics
details.
Holding RP at V
and Erase operations on all blocks will be possible. The transition from V
slower than t
Ready/Busy output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode
and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
characteristics
During Program or Erase operations Ready/Busy is Low, V
during Read/Reset commands or hardware resets until the memory is ready to enter Read
mode.
Byte/Word Organization Select (BYTE)
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V
bit mode, when it is High, V
PLPX
. After Reset/Block Temporary Unprotect goes High, V
PHPHH
and
and
ID
will temporarily unprotect the protected blocks in the memory. Program
.
Figure 14: Reset/Block Temporary Unprotect AC
Figure 14: Reset/Block Temporary Unprotect AC
IH
, the memory is in 16-bit mode.
Table 15: Reset/Block Temporary Unprotect AC
Table 15: Reset/Block Temporary Unprotect AC
PHEL
or t
OL
RHEL
. Ready/Busy will remain Low
M29W400DT, M29W400DB
IH
, whichever occurs last.
, the memory will be
waveforms, for more
waveforms.
IL
, the memory is in 8-
IH
to V
ID
must be
IL
, for at