W9412G6IH-5 Winbond Electronics, W9412G6IH-5 Datasheet - Page 11

• Manufacturer Part Number: W9412G6IH-5
• Description: IC DDR-400 SDRAM 128MB 66TSSOPII
• Manufacturer: Winbond Electronics

Specifications of W9412G6IH-5

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 250MHz
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOPII
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.2.8
7.2.9
7.2.10 No-Operation Command
7.2.11 Burst Read Stop Command
7.2.12 Device Deselect Command
7.2.13 Auto Refresh Command
1) READA ≥ t
2) t
( RAS = “L”, CAS = “L”, WE = “L”, BA0 = “L”, BA1 = “L”, A0 to A11 = Register Data)
The Mode Register Set command programs the values of CAS Latency, Addressing Mode, Burst
Length and DLL reset in the Mode Register. The default values in the Mode Register after power-
up are undefined, therefore this command must be issued during the power-up sequence. Also,
this command can be issued while all banks are in the idle state. Refer to the table for specific
codes.
( RAS = “L”, CAS = “L”, WE = “L”, BA0 = “H”, BA1 = “L”, A0 to A11 = Register data)
The Extended Mode Register Set command can be implemented as needed for function
extensions to the standard (SDR-SDRAM). Currently the only available mode in EMRS is DLL
enable/disable, decoded by A0. The default value of the extended mode register is not defined;
therefore this command must be issued during the power-up sequence for enabling DLL. Refer to
the table for specific codes.
( RAS = “H”, CAS = “H”, WE = “H”)
The No-Operation command simply performs no operation (same command as Device Deselect).
( RAS = “H”, CAS = “H”, WE = “L”)
The Burst stop command is used to stop the burst operation. This command is only valid during a
Burst Read operation.
( CS = “H”)
The Device Deselect command disables the command decoder so that the RAS , CAS ,
( RAS = “L”, CAS = “L”, WE = “H”, CKE = “H”, BA0, BA1, A0 to A11 = Don’t Care)
WE and Address inputs are ignored. This command is similar to the No-Operation command.
AUTO REFRESH is used during normal operation of the DDR SDRAM and is analogous to CAS–
BEFORE–RAS (CBR) refresh in previous DRAM types. This command is non persistent, so it
must be issued each time a refresh is required.
The refresh addressing is generated by the internal refresh controller. This makes the address
bits ”Don’t Care” during an AUTO REFRESH command. The DDR SDRAM requires AUTO RE-
Internal precharge operation begins after BL/2 cycle from Read with Auto-precharge command.
Data can be read with shortest latency, but the internal Precharge operation does not begin until
after t
This command must not be interrupted by any other command.
RCD(min)
Mode Register Set Command
Extended Mode Register Set Command
RAS (min)
≤ READA < t
RAS (min)
has completed.
- (BL/2) x t
RAS(min)
CK
- (BL/2) x t
CK
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Publication Release Date: Sep. 16, 2009
W9412G6IH
Revision A06