PLC810PG Power Integrations, PLC810PG Datasheet - Page 13

• Manufacturer Part Number: PLC810PG
• Description: IC OFFLINE CTRLR CM OCP HV 24DIP
• Manufacturer: Power Integrations
• Series: HiperPLC™r

Specifications of PLC810PG

• Output Isolation: Isolated
• Frequency Range: 50 ~ 300kHz
• Voltage - Input: 8.1 ~ 15 V
• Voltage - Output: 600V
• Power (watts): 700mW
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-DIP (0.300", 7.62mm)
• Switching Frequency: 300 KHz
• Maximum Power Dissipation: 700 mW
• Mounting Style: Through Hole
• For Use With: 596-1265 - KIT REF DESIGN FOR PLC810
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 596-1264-5

Figure 7.
FBL pin
The FBL pin is the voltage regulation feedback pin. It sinks
current in normal operation. The greater the input current, the
higher the LLC switching frequency. The characteristic of
frequency versus the size of shunt resistor (connected to VREF)
is given in Figure 16. The FBL pin has a Thevenin equivalent
circuit of nominally 0.65 V and 3.3 kW. It should be noted that
the 1 nF decoupling Capacitor, C
with the 3.5 kW input resistance presented by the FBL pin,
form a pole in the LLC transfer function. This needs to be
considered as part of the LLC feedback loop. To insure loop
stability the 1 nF capacitor should not be increased.
A typical feedback network uses a TL431 and an optocoupler
for output regulation. The optocoupler regulates current
provided to the FBL pin. A resistor network between the
optocoupler and the FBL pin sets the minimum, maximum, and
start-up currents into the FBL pin.
In Figure 7 optocoupler U1B is connected to the FBL pin
through a resistor network comprised of resistors R1, R2, R3,
R4, and the Capacitor C
start and can be ignored during normal operation. Copto is a
filter capacitor that reduces noise from the long optocoupler
traces. The value (R3 + R4) sets the minimum FBL pin current
and therefore minimum LLC frequency, F
optocoupler is turned off). This occurs at the end of holdup
time, when the bulk capacitor has discharged down to 64%
(nominal) of the regulation set point.
The maximum FBL pin current (and therefore the maximum LLC
frequency that the feedback loop can command) is set by R2,
R3, and R4. Maximum frequency occurs when the optocoupler
is fully saturated, such as when the LLC output moves above
the set point during an output load dump. It should be noted
that if the maximum FBL pin current is greater than the FMAX
pin current, the LLC gate drivers turn both MOSFETs off.
The start-up current (and therefore the starting frequency), is
determined by the value of R3. Note that during start-up, C
www.powerint.com
VREF
GND
FBL
Typical LLC Feedback Network.
4
20
2
C
START
C
1 nF
FBL
START
. C
R4
R3
START
R2
FBL
(see Figure 7), in conjunction
is active only during soft
MIN
C
1 nF
PI-5276-121108
OPTO
(when the
D1
R1
U1B
START
is a virtual short-circuit, the optocoupler is turned off and all
FBL pin current comes from R3.
The procedure for selecting the resistor values is as follows.
Choose R1
This is the main load resistance in series with the optocoupler.
A value of 1.8 kW will yield good frequency response with an
acceptable maximum collector load current of approximately
2 mA. Note that the overall loop gain will be proportional to this
resistor value.
Choose F
F
Determine the resistance value that corresponds to the desired
F
have a value close to that of the FMAX resistor.
The next step is to set F
needs in order to regulate at full load, F
sum of (R3 + R4). Look up the resistance value R for the
desired F
below.
Calculate the Value of R2
I
optocoupler is saturated. This represents the maximum
frequency that the feedback loop can command via the FBL
pin. If this current is greater than the FMAX pin current (set by
the FMAX pin resistor), the LLC converter may be forced into
hysteretic burst-mode in order to regulate the output voltage at
zero or light load. If burst-mode is not desired, I
set less than the FMAX pin current. In this case, ensure that
there is sufficient dead-time given by the FMAX pin resistor. If
F
load, then burst mode operation will be required.
The relationship between I
given in Figure 17. The relationship between I
resistor values is given below (1):
V
We can and then substitute this into (1) and rearrange:
Where V
V
V
V
I
R
FBL(MAX)
FBL MAX
START
START
MAX
CESAT
R2
D
REF
2
= diode forward voltage drop
(
(the voltage across R2) can be defined as:
=
= 3.25 V (nominal)
is less than the frequency needed for regulation at light
is typically chosen to be equal to or just less than F
from Figure 16. Set R3 to this value. R3 will typically
)
= V
=
is the current that flows into the FBL pin when the
V
FBL
V
MIN
V
R2
CE
START
R
REF
is a function of I
I
of optocoupler in saturation (typical 0.3 V)
2
in Figure 16. Set R4 according to the equation
FBL MAX
=
-
(the initial frequency at start-up)
R
(
V
V
3
+
FBL
)
REF
R
^
R
3
I
-
4
FBL MAX
+
MIN
R
(
V
I
4
. F
FBL
FBL MAX
CESAT
FBL
h
=
+
(FBL pin current) and frequency is
(
MIN
R
V
R
)
-
is the frequency that the LLC
REF
R
-
3
PLC810PG
4
V
-
+
R
-
FBL
V
3
MIN
R
CESAT
V
^
4
I
is determined by the
REF
FBL MAX
-
+
FBL(max)
(
V
R
FBL(max)
2
FBL
V
)
h
FBL
^
-
I
and the
FBL MAX
]
V
must be
(
I
FBL MAX
Rev. F 08/09
D
MAX
)
(
h
13
-
.
)
V
g
(1)
(2)
(3)
D