PCA9512AD,112 NXP Semiconductors, PCA9512AD,112 Datasheet
PCA9512AD,112
Specifications of PCA9512AD,112
935279721112
PCA9512AD
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PCA9512AD,112 Summary of contents
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PCA9512A; PCA9512B Level shifting hot swappable I Rev. 5 — 5 January 2011 1. General description The PCA9512A hot swappable I insertion into a live backplane without corruption of the data and clock buses and includes two dedicated ...
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... NXP Semiconductors Operating power supply voltage range 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: SO8, TSSOP8 (MSOP8) 3 ...
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... NXP Semiconductors 6. Block diagram PCA9512A SLEW RATE ACC DETECTOR SDAIN CONNECT 100 kΩ RCH1 100 kΩ RCH2 SLEW RATE ACC DETECTOR SCLIN CONNECT 0.55V / CC 0.45V CC 100 μs UVLO DELAY Fig 1. Block diagram of PCA9512A/B PCA9512A_PCA9512B Product data sheet PCA9512A; PCA9512B Level shifting hot swappable I ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning SCLOUT Fig 2. 7.2 Pin description Table 3. Symbol V CC2 SCLOUT SCLIN GND ACC SDAIN SDAOUT Functional description Refer to 8.1 Start-up When the PCA9512A/B is powered up, either V time of each other and either may be more positive or they may be equal, however the ...
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... NXP Semiconductors bus idle’ detect circuit is enabled. When all the SDAn and SCLn pins have been HIGH for the bus idle time or when all pins are HIGH and a STOP condition is seen on the SDAIN and SCLIN pins, the connect circuitry is activated, connecting SDAIN to SDAOUT and SCLIN to SCLOUT. The 1 V precharge circuitry is disabled when the connection is made, unless the ACC pin is LOW ...
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... NXP Semiconductors The PCA9510A (rise time accelerator is permanently disabled) and the PCA9512A/B (rise time accelerator can be turned off) are a little different with the rise time accelerator turned off because the rise time accelerator will not pull the node up, but the same logic that turns on the accelerator turns the pull-down off ...
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... NXP Semiconductors slew rate is slow enough that the output catches up it will still lag the falling voltage of the input by the offset voltage. The maximum t zero delay and the output is still limited by its turn-on delay and the falling edge slew rate. The output falling edge slew rate is a function of the internal maximum slew rate which is a function of temperature, V load capacitance ...
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... NXP Semiconductors (kΩ (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with rise time accelerator turned on. (2) Rise time accelerator off. Fig 5. Bus requirements for 3.3 V systems (kΩ (1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with rise time accelerator turned on. ...
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... NXP Semiconductors 8.8 Hot swapping and capacitance buffering application Figure 7 advantage of both its hot swapping and capacitance buffering features. In all of these applications, note that if the I/O cards were plugged directly into the backplane, all of the backplane and card capacitances would add directly together, making rise time and fall time requirements difficult to meet ...
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... NXP Semiconductors BACKPLANE CONNECTOR BACKPLANE V CC2 V CC SDA SCL kΩ 10 kΩ Remark: Application assumes bus capacitance within ‘proper operation’ region of Fig 8. Hot swapping multiple I/O cards into a backplane using the PCA9512A with a custom connector kΩ SDA SCL Remark: Application assumes bus capacitance within ‘proper operation’ region of Fig 9 ...
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... NXP Semiconductors 9. Application design-in information kΩ SDA SCL Fig 10. Typical application 10. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC [1] V supply voltage 2 CC2 V voltage on any other pin n I input current I I input/output current ...
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... NXP Semiconductors 11. Characteristics Table 5. Characteristics − 2 5 amb Symbol Parameter Power supply V supply voltage CC [2] V supply voltage 2 CC2 I supply current CC I supply current 2 CC2 Start-up circuitry V precharge voltage pch t enable time en t idle time idle Rise time accelerators I transient boosted pull-up ...
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... NXP Semiconductors Table 5. Characteristics …continued − 2 5 amb Symbol Parameter System characteristics f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) START HD;STA condition t set-up time for a repeated SU;STA START condition t set-up time for STOP SU ...
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... NXP Semiconductors 11.1 Typical performance characteristics 2. (mA 5 3.3 V 1.95 2.7 V 1.75 1.55 1.35 −40 +25 I (pin 1) typical current averages 0.1 mA less than I CC2 on pin 8. Fig 11. I versus temperature 5 PHL (ns) 80 2 −40 + > 100 pF PU(in) Fig 13. Input/output t versus temperature PHL PCA9512A_PCA9512B ...
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... NXP Semiconductors 12. Test information R = load resistor load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 15. Test circuitry for switching times PCA9512A_PCA9512B Product data sheet PCA9512A; PCA9512B Level shifting hot swappable PULSE DUT GENERATOR R T All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 18. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Abbreviations Table 8. Acronym AdvancedTCA CDM cPCI ESD HBM 2 I C-bus MM PCI PICMG SMBus VME PCA9512A_PCA9512B Product data sheet ...
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... NXP Semiconductors 16. Revision history Table 9. Revision history Document ID Release date PCA9512A_PCA9512B v.5 20110105 • Modifications: • • PCA9512A v.4 20090819 PCA9512A v.3 20090720 PCA9512A v.2 20090528 PCA9512A v.1 20051007 PCA9512A_PCA9512B Product data sheet Level shifting hot swappable I Data sheet status Product data sheet Added basic type number PCA9512B Section 1 “ ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... Product data sheet PCA9512A; PCA9512B Level shifting hot swappable I own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Feature selection . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 4 8.1 Start- 8.2 Connect circuitry . . . . . . . . . . . . . . . . . . . . . . . . 5 8.3 Maximum number of devices in series . . . . . . . 5 8 ...