LTC4240CGN Linear Technology, LTC4240CGN Datasheet - Page 20

IC CTRLR HOTSWAP CPCI I2C 28SSOP

LTC4240CGN

Manufacturer Part Number
LTC4240CGN
Description
IC CTRLR HOTSWAP CPCI I2C 28SSOP
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet

Specifications of LTC4240CGN

Applications
CompactPCI™
Internal Switch(s)
No
Voltage - Supply
3.3V, 5V, ±12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.150", 3.95mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC4240CGN
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LTC4240
APPLICATIO S I FOR ATIO
sense resistor drops to 0.0049 and the largest value of
threshold voltage increases to 60mV. This results in a trip
current of 12.2A.
Plug-in board designers are thus limited to using less than
9.8A when a nominal 0.005 resistor is used. Using more
than 9.8A runs the risk of turning off the external FET.
Since the CompactPCI specification allows a maximum
1A/pin, at least 10 pins must be used to supply 9.8A. This
implies that only the 3.3V supply can use a 0.005
resistor, since the 5V supply has a maximum of 8 pins
available. To adhere to the 1A/pin specification, the 5V
sense resistor should be larger than the 3.3V sense
resistor. Typical applications show a nominal 0.007
resistor, which results in a 7.04A maximum deliverable
current to the plug-in board loads. The 7.04A current
implies at least 7 pins on the 5V connector. Note that the
thermal considerations of the external FET will also place
limitations on the maximum allowable current.
5V and 3.3V External FET Selection
The LTC4240 uses external power FETs to limit and
modulate the current delivered by the 3.3V and 5V sup-
plies. There are several parameters to consider when
selecting the FET:
1. On resistance.
2. Gate and drain breakdown voltage.
3. Steady state and transient power dissipation.
20
Figure 9. Circuit Breaker Equivalent
Circuit for Calculating R
5V
IN
I
LOAD(MAX)
U
5V
21
IN
+
R
SENSE
V
CB
U
+
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
20
5V
SENSE
LTC4240*
V
V
V
CB(MAX)
CB(NOM)
CB(MIN)
SENSE
W
= 50mV
= 60mV
= 55mV
4240 F09
U
On Resistance
The CompactPCI specification limits the total IR drop of
the FET plus the IR drop of the sense resistor to 100mV.
For a nominal sense resistor of 0.005 , if the user limits
the 3.3V supply load current to 8.7A, then the maximum
FET resistance should be less than 0.0063 . Similarly, for
a 6.2A load current on the 5V supply and a 0.007 sense
resistor, the maximum 5V FET resistance should be
0.0088 . Note that above values of FET resistance are
worst case over temperature (on the FET’s datasheet, find
the resistance vs temperature curve and de-rate the room
temperature maximum value).
Breakdown Voltage
The maximum DC voltage that can appear across the
drain/source of the external power FET is 5V +10%. During
transient events and hot swap conditions, parasitic induc-
tances could cause ringing up to 3 times the supply
voltage. The use of voltage transient suppressors at the 5V
and 3.3V inputs can limit these voltage swings to less than
10V (see front page schematic). Similarly, the largest DC
voltage that is likely to appear across the gate is 12V
+10%. Voltage suppressors on the 12V
limit the transient spikes on that node. Additionally, the
total capacitance on the GATE node will serve to filter fast
voltage noise spikes. FETs with a minimum rating of 20V
on both the drain/source and the gate/source are recom-
mended.
Steady State Power Dissipation
For a user selected maximum load current of 8.7A on the
3.3V power supply and a 0.0063 maximum FET resis-
tance, the DC power dissipation is:
This is within the SOA limits of most power FETs.
(I
MAX
)
2
(R
DSON,MAX
) = (8.7)(8.7)(0.0063) = 0.477W
IN
node will also
4240f

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