DS1873T+ Maxim Integrated Products, DS1873T+ Datasheet - Page 69
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DS1873T+
Manufacturer Part Number
DS1873T+
Description
IC CTLR SFP+ ANLG LDD 28-TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Controllerr
Datasheet
1.DS1873TTR.pdf
(86 pages)
Specifications of DS1873T+
Number Of Channels
1
Voltage - Supply
2.85 V ~ 3.9 V
Current - Supply
2.5mA
Operating Temperature
-40°C ~ 95°C
Package / Case
28-WFQFN Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
90-1873T+000
Table 02h, Register BAh: IBIASMAX
Table 02h, Register BBh: ISTEP
BAh
BBh
SFP+ Controller with Analog LDD Interface
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
This value defines the maximum DAC value allowed for the upper 8 bits of BIAS output during APC closed-loop
operations. During the intial step and binary search, this value does not cause an alarm, but does still clamp the
BIAS DAC value. After the startup sequence (or normal APC operations), if the APC loop tries to create a BIAS
value greater than this setting, it is clamped and creates a MAX BIAS alarm.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
The initial step value used at power-on or after a TXD pulse to control the BIAS DAC. At startup, this value plus
2
At that time, a binary search is used to complete the startup of the APC closed loop. If the resulting math
operation is greater than IBIASMAX (Table 02h, Register BAh), the result is not loaded into the BIAS DAC, but the
binary search is begun to complete the initial search for APC. During startup, the BIAS DAC steps causing a
higher bias value than IBIASMAX do not create the BIAS MAX alarm. The BIAS MAX alarm detection is enabled at
the end of the binary search.
0
= 1 is continuously added to the BIAS DAC value until the APC feedback (MON2) is greater than its threshold.
BIT 7
BIT 7
2
2
______________________________________________________________________________________
9
9
2
2
8
8
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Nonvolatile (SEE)
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Nonvolatile (SEE)
2
2
7
7
2
2
6
6
2
2
5
5
2
2
4
4
2
2
3
3
BIT 0
BIT 0
2
2
2
2
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