DS3882E+C Maxim Integrated Products, DS3882E+C Datasheet - Page 20

• Manufacturer Part Number: DS3882E+C
• Description: IC CCFL CNTRLR DUAL 28TSSOP
• Manufacturer: Maxim Integrated Products
• Type: CCFL Controllerr

Specifications of DS3882E+C

• Frequency: 40 ~ 100 kHz
• Current - Supply: 12mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-TSSOP
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3390330

Table 3. Status Register 2 (SR2) [SRAM, E1h]
Table 4. Brightness Lamp Current Register (BLC) [SRAM, E3h]
Dual-Channel Automotive CCFL Controller
Note 1: Writing to this register has no effect on it.
Note 2: See Figure 8 for more details on how the status bits are set.
Note 3: SR2 is cleared when any of the following occurs:
20
BIT
BIT
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
____________________________________________________________________
• V
• the SVML or SVMH thresholds are crossed
• the PDN hardware pin goes high
• the PDNE software bit is written to a logic 1
• the channel is disabled by the CH2D control bit
R/W
R
R
R
R
R
R
R
R
CC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
drops below the UVLO threshold
POWER-UP
DEFAULT
FACTORY
DEFAULT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FAULT_RT
FAULT_L
LOUT_L
STO_L
LOC_L
NAME
RSVD
RSVD
OV_L
NAME
CH1D
CH2D
SEEB
LC0
LC1
LC2
LC3
LC4
Fault Condition—Real Time. A real-time bit that indicates the current operating status
of channel 2.
0 = Normal condition
1 = Fault condition
Fault Condition—Latched. A latched bit that is set when the channel enters a fault
condition. This bit is cleared when read regardless of the current state of fault.
Lamp Strike Time Out—Latched. A latched bit that is set when the lamp fails to strike.
This bit is cleared when read.
Overvoltage—Latched. A latched bit that is set when a lamp overvoltage is present
for at least 64 lamp cycles. This bit is cleared when read.
Lamp Out—Latched. A latched bit that is set when a lamp out is detected. This bit is
cleared when read.
Lamp Overcurrent—Latched. A latched bit that is set when a lamp overcurrent is
detected. This bit is cleared when read.
Reserved. Could be either 0 or 1 when read.
Reserved. Could be either 0 or 1 when read.
These five control bits determine the target value for the lamp current. 11111b is
35% of the nominal level and 00000b is 100% of the nominal level. These control
bits are used for fine adjustment of the lamp brightness.
Channel 1 Disable
0 = Channel 1 enabled
1 = Channel 1 disabled
Channel 2 Disable. Useful for dimming in two lamp applications.
0 = Channel 2 enabled
1 = Channel 2 disabled
SRAM-Shadowed EEPROM Write Control
0 = Enables writes to EEPROM
1 = Disables writes to EEPROM
FUNCTION
FUNCTION