TLE8104E Infineon Technologies, TLE8104E Datasheet - Page 17

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TLE8104E

Manufacturer Part Number
TLE8104E
Description
IC SWITCH LOSIDE 4CH DSO-20
Manufacturer
Infineon Technologies
Type
Low Sider
Datasheet

Specifications of TLE8104E

Input Type
SPI
Number Of Outputs
4
On-state Resistance
320 mOhm
Current - Output / Channel
1A
Current - Peak Output
3A
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-20
Packages
PG-DSO-20
Thermal Class
Exposed Pad
Id Nom
4 x 1 A
Pin Count
20.0 Pins
Channels
4.0
Comment
inductive and resistive loads (e.g. injectors)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000272317
TLE8104E
TLE8104ETR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE8104E
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
TLE8104E
0
Part Number:
TLE8104ES1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
TLE8104EXUMA2
0
Electrical Characteristics: SPI Interface (cont’d)
V
all voltages with respect to ground, positive current flowing into pin
Pos.
5.5.6
5.5.7
5.5.8
5.5.9
5.5.10
5.5.11
5.5.12
5.5.13
5.5.14
5.5.15
5.5.16
5.5.17
5.5.18
5.5.19
1) Not subject to production test, specified by design.
2) This time is necessary between two write accesses. To get the correct diagnostic information, the transfer delay time has
Data Sheet
S
= 4.5 V to 5.5 V,
to be extended to the maximum fault delay time
Parameter
Serial Clock Period (1/
(depending on SO load)
Serial Clock High Time
Serial Clock Low Time
Enable Lead Time (falling edge of
CS
Enable Lag Time (falling edge of
SCLK to rising edge of
Data Setup Time (required time SI
to falling of SCLK)
Data Hold Time (falling edge of
SCLK to SI)
Disable Time
Transfer Delay Time
between two accesses)
Data Valid Time
Input Low Voltage
Input High Voltage
Input Voltage Hysteresis
SO Tri-state leakage current
to rising edge of SCLK)
T
j
= -40 °C to +150 °C, (unless otherwise specified)
1)
1)
2)
(
f
CS
sclk
CS
1)
)
high time
)
Symbol
t
t
t
t
t
t
t
t
t
t
V
V
V
V
V
V
V
V
V
I
pSCLK
SCLK(H)
SCLK(L)
lead
lag
SU
H
DIS
dt
valid
SOlkg
t
SI(L)
CS(L)
SCLK(L)
SI(H)
CS(H)
SCLK(H)
SI(Hys)
CS(Hys)
SCLK(Hys)
d(fault)max
,
,
,
,
,
,
= 200 µs.
17
Min.
200
50
50
250
250
20
20
200
-0.3
2.0
50
-10
Smart Quad Channel Powertrain Switch
Electrical and Functional Description of Blocks
Limit Values
Typ.
110
120
150
100
Max.
150
160
170
200
1.0
V
200
10
S
+
0.3 V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
mV
µA
Conditions
C
C
C
CS = 1,
0 V ≤
L
L
L
V1.4, 2010-04-26
= 50 pF
= 100 pF
= 220 pF
V
TLE8104E
SO
V
S

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