BTS840S2 Infineon Technologies, BTS840S2 Datasheet - Page 10

• Manufacturer Part Number: BTS840S2
• Description: IC SWITCH PWR HISIDE 2CH DSO-20
• Manufacturer: Infineon Technologies
• Series: PROFET®r
• Type: High Sider

Specifications of BTS840S2

• Input Type: Non-Inverting
• Number Of Outputs: 2
• On-state Resistance: 27 mOhm
• Current - Output / Channel: 12A
• Current - Peak Output: 50A
• Voltage - Supply: 5 V ~ 34 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: BTS840S2; BTS840S2INTR; BTS840S2NT; BTS840S2T; SP000011324

GND disconnect
V
Any kind of load. In case of IN = high is V
Due to V
GND disconnect with GND pull up
each channel
Any kind of load. If V
Due to V
V
load,
For inductive load currents up to the limits defined by Z
(max. ratings and diagram on page 10) each switch is
protected against loss of V bb .
Consider at your PCB layout that in the case of Vbb dis-
connection with energized inductive load all the load current
flows through the GND connection.
Infineon technologies
bb
bb
V
V
disconnect with energized inductive
V
bb
bb
IN
each channel
GND
GND
V
high
ST
> 0, no V
> 0, no V
V
IN
V
ST
IN
ST
GND
IN
ST
IN
ST
ST
ST
, each channel
= low signal available.
> V
= low signal available.
PROFET
PROFET
PROFET
GND
GND
GND
IN
V
V
V
bb
bb
bb
- V
V
GND
V
IN(T+)
GND
OUT
OUT
OUT
OUT
device stays off
V
IN
- V
IN(T+)
L
10
.
Inductive load switch-off energy
dissipation
Energy stored in load inductance:
While demagnetizing load inductance, the energy
dissipated in PROFET is
with an approximate solution for R L
Maximum allowable load inductance for
a single switch off
L = f (I L ); T j,start = 150°C, V bb = 12 V, R L = 0
Z L [mH]
=
100
10
E
0.1
1
AS
4
E
=
E
bb
2
AS
I
L
6
·
R
·
= E
L
L
(
, each channel
8
V
bb
bb
10 12 14
IN
ST
+ E
+ |V
E
L
L
PROFET
- E
OUT(CL)
=
(one channel)
GND
1 /
V
R
bb
2
= V
·
L
16 18
|)
·
ON(CL)
I
2
L
ln
OUT
(1+
E AS
0 :
BTS 840 S2
4)
20 22 24
·
Z
2003-Oct-01
|V
i
L
L
(t) dt,
{
OUT(CL)
I
R
L
I L [A]
L
·
L
R
L
|
E
E
E Load
)
R
L