TLE7184F Infineon Technologies, TLE7184F Datasheet - Page 19
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TLE7184F
Manufacturer Part Number
TLE7184F
Description
IC DRIVER 3PH BRIDGE 48-VQFN
Manufacturer
Infineon Technologies
Datasheet
1.TLE7184F.pdf
(35 pages)
Specifications of TLE7184F
Applications
DC Motor Controller, Brushless (BLDC), 3 Phase
Number Of Outputs
1
Voltage - Supply
6 V ~ 45 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN
Mounting Style
SMD/SMT
Packages
PG-VQFN-48
Operating Range
7.0 - 32.0 V
Iq
50 ?A
Turn On/off Current
-
D.c.-range @ 20khz
0...95%
Numbers Of Integrated Opamps For Load Current Measurement
1.0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
SP000362096
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE7184F
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
8
8.1
The TLE7184F has an integrated interface supporting the typical PWM interface between a remote master ECU
and the µC. The link to the external master ECU is a single wire communication based on the battery voltage and
running typ. with about 10 to 400 Hz. The information is encoded in the duty cycle of the signal.
This communication line requires a signal conditioning to connect to the on board µC.
The integrated circuit supports the incoming data path.
The outgoing data path is formed by external components
Figure 8
The integrated circuitry is described in
The main task of this interface is level shifting and protection of the µC.
The IFuC signal is following the IFMA signal, passing the duty cycle information from IFMA to the IFuC.
The µC port is used as input and is listening to the IFuC signal. The voltage at IFMA is monitored. If IFMA is low
the IFuC open drain output is switched on - forcing the IFuC signal to low.
If IFMA is high, the IFuC open drain output is deactivated and the IFuC signal is pulled to high by the internal pull-
up resistor.
The IFMA input is used as well for wake-up. See
8.2
The System IC has an integrated switch connecting the VDH pin to the VDHS pin. This allows to place an external
voltage divider for VDH voltage monitoring at the VDHS pin and to disconnect this voltage divider from VDH during
sleep mode to assure low current consumption. The VDHS switch is only deactivated when the VDD regulator is
switched off.
8.3
The System IC provides a digital output INHD showing the logic state of INH (e.g. KL15) after complete wake-up
of the driver (approx. 1ms). The input levels of INH for the INHD output are defined separately from the levels for
wake up. Voltage levels for INH wake up function please see
output stage consists of an integrated low side switch with a pull-up resistor to VDD.
Data Sheet
VCC
uC
Interface, VDH Switch and INH Digital Output
PWM Interface (IFMA)
Structure PWM Interface
VDHS Switch
Digital Output INHD
Interface_uC
IFuC
GND
VDD
Figure
T1
TLE 7184 F
8.
T1 control
Chapter 9.1
GND
19
Wake up
Chapter 9.4
Interface, VDH Switch and INH Digital Output
IFMA
section Wake-up and go-to-sleep. The
10k
interface
KL 30
Pull up
T2
Rev. 1.0, 2008-12-04
T3
ECU
TLE7184F