AT73C237 Atmel, AT73C237 Datasheet - Page 24

IC POWER MANAGEMENT UNIT 16QFN

AT73C237

Manufacturer Part Number
AT73C237
Description
IC POWER MANAGEMENT UNIT 16QFN
Manufacturer
Atmel
Datasheet

Specifications of AT73C237

Applications
Wireless
Current - Supply
250µA
Voltage - Supply
2.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.13
24
Two-wire Interface (TWI) Protocol
AT73C237
The two-wire interface interconnects components on a unique two-wire bus, made up of one
clock line and one data line with speeds up to 400 Kbits per second, based one a byte oriented
transfer format. The TWI is slave only and single byte access.
The interface adds flexibility to the power supply solution, enabling LDO regulators to be con-
trolled depending on the instantaneous application requirements.
The AT73C237 has the following 7-bit address:1001000.
Attempting to read data from register addresses not listed in this section results in 0xFF being
read out.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first. Each byte must
be followed by an acknowledgement.
Each transfer begins with a START condition and terminates with a STOP condition.
Figure 9-5.
Figure 9-6.
After the host initiates a Start condition, it sends the 7-bit slave address defined above to notify
the slave device. A Read/Write bit follows (Read = 1, Write = 0).
The device acknowledges each received byte.
The first byte sent after device address and R/W bit is the address of the device register the host
wants to read or write.
For a write operation the data follows the internal address
For a read operation a repeated Start condition needs to be generated followed by a read on the
device.
• TWCK is an input pin for the clock
• TWD is an open-drain pin that drives or receives the serial data
• A high-to-low transition on TWD while TWCK is high defines a START condition.
• A low-to-high transition on TWD while TWCK is high defines a STOP condition.
TWD
TWCK
TWI Start/Stop Cycle
TWI Data Cycle
Start
TWCK
Address
TWD
R/W
Start
Ack
Data
Ack
Data
Stop
Ack
6362A–PMAAC–01-Jul-08
Stop

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