IR3502BMTRPBF International Rectifier, IR3502BMTRPBF Datasheet - Page 8

• Manufacturer Part Number: IR3502BMTRPBF
• Description: IC REG XPH INTEL VR11.1 32-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3502BMTRPBF

• Package / Case: 32-MLPQ
• Mounting Type: Surface Mount
• Current - Supply: 8mA
• Voltage - Supply: 8 V ~ 16 V
• Operating Temperature: 0°C ~ 100°C
• Applications: Processor
• Operating Temperature (max): 150C
• Operating Temperature (min): 0C
• Pin Count: 32
• Mounting: Surface Mount
• Package Type: MLPQ
• Case Length: 5mm
• Screening Level: Commercial
• Package: 32-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN DESCRIPTION
PIN#
1-8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
9
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PIN SYMBOL
VDAC_BUFF
ROSC/OVP
VCCLDRV
PHSOUT
HOTSET
VOSEN+
CLKOUT
ENABLE
VOSEN-
VSETPT
PGOOD
VRHOT
EAOUT
SS/DEL
VID7-0
PHSIN
VDRP
VDAC
LGND
VCCL
IMON
VO
VN
FB
IIN
Inputs to VID D to A Converter.
Enable input. A logic low applied to this pin puts the IC into fault mode. Do not float
this pin as the logic state will be undefined.
Open collector output of the VRHOT comparator which drives low if HOTSET pin
voltage is lower than 1.6V. Connect external pull-up.
A resistor divider including thermistor senses the temperature, which is used for
VRHOT comparator.
Remote sense amplifier input. Connect to ground at the load.
Remote sense amplifier input. Connect to output at the load.
Remote sense amplifier output.
Inverting input to the Error Amplifier.
Output of the error amplifier.
Buffered, scaled and thermally compensated IIN signal. Connect an external RC
network to FB to program converter output impedance.
Node for DCR thermal compensation network.
Buffered VDAC.
Error amplifier non-inverting input. Converter output voltage can be decreased from
the VDAC voltage with an external resistor connected between VDAC and this pin
(there is an internal sink current at this pin).
Regulated voltage programmed by the VID inputs. Connect an external RC network
to LGND to program dynamic VID slew rate and provide compensation for the
internal buffer amplifier.
Programs converter startup and over current protection delay timing. It is also used
to compensate the constant output current loop during soft start. Connect an
external capacitor to LGND to program.
Connect a resistor to LGND to program oscillator frequency and OCSET, VSETPT
and VDAC bias currents. Oscillator frequency equals switching frequency per phase.
The pin voltage is 0.6V during normal operation and higher than 1.6V if an over-
voltage condition is detected.
Local Ground for internal circuitry and IC substrate connection.
Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
Phase clock output at switching frequency per phase. Connect to PHSIN pin of the
first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Voltage regulator and IC power input. Connect a decoupling capacitor to LGND.
Average current input from the phase IC(s). This pin is also used to communicate
over voltage condition to phase ICs.
Output of the VCCL regulator error amplifier to control external transistor. The pin
senses 12V power supply through a resistor.
Open collector output that drives low during startup and under any external fault
condition. Indicates converter within regulation. Connect external pull-up.
Voltage at IOUT pin will be proportional to load current.
PIN DESCRIPTION
IR3502B
V3.2