ISL24006IRZ-T7 Intersil, ISL24006IRZ-T7 Datasheet - Page 9

IC VOLT GEN I2C 14-CH 38-QFN

ISL24006IRZ-T7

Manufacturer Part Number
ISL24006IRZ-T7
Description
IC VOLT GEN I2C 14-CH 38-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL24006IRZ-T7

Applications
LCD Drive, Reference Voltage Generator
Current - Supply
30mA
Voltage - Supply
5 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-VQFN Exposed Pad, 38-HVQFN, 38-SQFN, 38-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The maximum power dissipation allowed in a package is
determined according to:
P
where:
• T
• T
• θ
• P
The maximum power dissipation actually produced by the IC
is the total quiescent supply current times the total power
supply voltage and plus the power in the IC due to the loads.
P
when sourcing, and:
P
when sinking.
Where:
• i = 1 to total 14
• A
• I
• V
• I
By setting the two P
can solve for the R
package power dissipation curves provide a convenient way
to see if the device will overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
Good printed circuit board layout is necessary for optimum
performance. A low impedance and clean analog ground
plane should be used for the ISL24006. The traces from the
two ground pins to the ground plane must be very short. The
thermal pad should be connected to the analog ground
plane. Lead length should be as short as possible and all
power supply pins must be well bypassed. A 0.1µF ceramic
capacitor must be placed very close to the A
V
bypass ceramic capacitor should be placed to the A
V
DMAX
DMAX
DMAX
REFU_L
REFU_H
AVDD
LOAD
AMAX
JA
JMAX
VDD
DMAX
OUT
= Thermal resistance of the package
=
=
=
i = Output voltage of the i channel
i = Load current of the i channel
= Supply voltage
= Quiescent current
, V
= Maximum junction temperature
, V
= Maximum ambient temperature
T
-------------------------------------------- -
A
A
= Maximum power dissipation in the package
JMAX
VDD
VDD
REFL_H
REFU_L
Θ
×
×
JA
I
I
AVDD
AVDD
T
LOAD
AMAX
DMAX
, V
, V
REFL_L
REFL_H
+
+
s to avoid the device overheat. The
Σ A
Σ V
equations equal to each other, we
( [
(
OUT
9
, and BG pins. A 4.7µF local
VDD
, V
i I
REFL_L
×
V
LOAD
OUT
pins.
i )
i
)
×
VDD
I
LOAD
, V
REFU_H
i
VDD
]
,
ISL24006
,
March 9, 2006
FN6110.1

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