ADT7463ARQZ ON Semiconductor, ADT7463ARQZ Datasheet - Page 24

• Manufacturer Part Number: ADT7463ARQZ
• Description: IC REMOTE THERMAL CTRLR 24-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7463ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 24-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7463
Configuring the Desired THERM Behavior
1. Configure the desired pin as the THERM input.
2. Select the desired fan behavior for THERM events.
3. Select whether THERM events should generate
Setting Bit 1 (THERM Enable) of Configuration Register 3
(Reg. 0x78) enables the THERM monitoring functionality.
This is enabled on Pin 14 by default.
Setting Bit 1 (TH5V) of Configuration Register 4
(Reg. 0x7D) enables THERM monitoring on Pin 20
(Bit 1 of Configuration Register 3 must also be set). Pin 14
can be used as TACH4.
Setting Bit 2 (BOOST bit) of Configuration Register 3
(Reg. 0x78) causes all fans to run at 100% duty cycle
whenever THERM gets asserted. This allows fail-safe system
cooling. If this bit = 0, the fans run at their current settings
and are not affected by THERM events.
SMBALERT interrupts.
Bit 5 (F4P) of Mask Register 2 (Reg. 0x75), when set, masks
out SMBALERTs when the THERM limit value gets
exceeded. This bit should be cleared if SMBALERTs based
on THERM events are required.
THERM LIMIT
(REG. 0x7A)
Figure 27. Functional Diagram of ADT7463’s THERM Monitoring Circuitry
364.16ms
728.32ms
182.08ms
91.04ms
45.52ms
22.76ms
2.914s
1.457s
0
1
2
3
4
5
Rev. 4 | Page 24 of 52 | www.onsemi.com
6
7
COMPARATOR
CLEARED
ON READ
–24–
7 6 5 4 3 2 1 0
IN
4. Select a suitable THERM limit value.
5. Select a THERM monitoring time.
LATCH
RESET
This value determines whether an SMBALERT is generated
on the first THERM assertion, or only if a cumulative THERM
assertion time limit is exceeded. A value of 0x00 causes an
SMBALERT to be generated on the first THERM assertion.
This is how often OS or BIOS level software checks the
THERM timer. For example, BIOS could read the THERM
timer once an hour to determine the cumulative THERM
assertion time. If, for example, the total THERM assertion
time is <22.76 ms in Hour 1, >182.08 ms in Hour 2, and
>5.825 s in Hour 3, this can indicate that system performance
is degrading significantly since THERM is asserting more
frequently on an hourly basis.
Alternatively, OS or BIOS level software can time-stamp
when the system is powered on. If an SMBALERT is gener-
ated due to the THERM limit being exceeded, another
time-stamp can be taken. The difference in time can be
calculated for a fixed THERM limit time. For example, if it
takes one week for a THERM limit of 2.914 s to be exceeded
and the next time it takes only 1 hour, then this is an
indication of a serious degradation in system performance.
OUT
1 = MASK
MASK REGISTER 2
STATUS REGISTER 2
F4P BIT (BIT 5)
(REG. 0x75)
F4P BIT (BIT 5)
2.914s
1.457s
728.32ms
364.16ms
182.08ms
91.04ms
45.52ms
22.76ms
THERM TIMER CLEARED ON READ
(REG. 0x79)
THERM
TIMER
THERM
SMBALERT
REV. C