ISL6439CB Intersil, ISL6439CB Datasheet - Page 9

• Manufacturer Part Number: ISL6439CB
• Description: IC CNTRLR PWM SYNC BUCK 14-SOIC
• Manufacturer: Intersil

Specifications of ISL6439CB

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 325kHz
• Duty Cycle: 100%
• Voltage - Supply: 3.3 V ~ 5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Frequency-max: 325kHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

that there is a path for the current to flow other than the
capacitance on the rail will prevent this failure mode.
Application Guidelines
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching efficiently at
300kHz or 600kHz, the resulting current transitions from one
device to another cause voltage spikes across the
interconnecting impedances and parasitic circuit elements.
These voltage spikes can degrade efficiency, radiate noise
into the circuit, and lead to device overvoltage stress.
Careful component layout and printed circuit board design
minimizes the voltage spikes in the converters.
As an example, consider the turn-off transition of the PWM
MOSFET. Prior to turn-off, the MOSFET is carrying the full load
current. During turn-off, current stops flowing in the MOSFET
and is picked up by the lower MOSFET. Any parasitic
inductance in the switched current path generates a large
voltage spike during the switching interval. Careful component
selection, tight layout of the critical components, and short, wide
traces minimizes the magnitude of voltage spikes.
There are two sets of critical components in a DC/DC
converter using the ISL6439. The switching components are
the most critical because they switch large amounts of
energy, and therefore tend to generate large amounts of
noise. Next are the small signal components which connect
to sensitive nodes or supply critical bypass current and
signal coupling.
A multi-layer printed circuit board is recommended. Figure 4
shows the connections of the critical components in the
converter. Note that capacitors C
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from
the GATE pins to the MOSFET gates should be kept short
and wide enough to easily handle the 1A of drive current.
The switching components should be placed close to the
ISL6439 first. Minimize the length of the connections between
the input capacitors, C
them nearby. Position both the ceramic and bulk input
capacitors as close to the upper MOSFET drain as possible.
Position the output inductor and output capacitors between the
upper MOSFET and lower MOSFET and the load.
IN
, and the power switches by placing
9
IN
and C
OUT
could each
ISL6439, ISL6439A
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Position the bypass capacitor, C
the VCC pin with a via directly to the ground plane. Place the
PWM converter compensation components close to the FB
and COMP pins. The feedback resistors for both regulators
should also be located as close as possible to the relevant
FB pin with vias tied straight to the ground plane as required.
Feedback Compensation
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
error amplifier (Error Amp) output (V
the oscillator (OSC) triangular wave to provide a pulse-
width modulated (PWM) wave with an amplitude of V
the PHASE node. The PWM wave is smoothed by the output
filter (L
The modulator transfer function is the small-signal transfer
function of V
Gain and the output filter (L
break frequency at F
OUT
FIGURE 4. PRINTED CIRCUIT BOARD POWER PLANES
) is regulated to the Reference voltage level. The
O
and C
ISL6439
OUT
KEY
CPVOUT
AND ISLANDS
UGATE
PHASE
LGATE
O
COMP
BOOT
).
GND
VCC
/V
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
FB
E/A
LC
C
C
. This function is dominated by a DC
VCC
BP
and a zero at F
R
C
2
C
2
O
BOOT
PHASE
R4
+3.3V V
and C
D1
C
1
C
IN
3
O
Q1
Q2
R
E/A
), with a double pole
1
R
ESR
3
) is compared with
C
L
IN
OUT
. The DC Gain of
C
OUT
BP
November 5, 2008
, close to
V
OUT
FN9057.5
IN
at